tag: Cadence

Postcards From The Edge (Of The Cloud)
By Brian Fuller - 12 Feb, 2015 - Comments: 0

The view from the edge of the cloud is pretty spectacular. Out here, there’s endless possibility. But out here on the edge, there’s turbulence, the cold buffeting swirl of today’s engineering challenges. On the edge, some see the Internet of Things (IoT) stalled. I wrote about this last month. The first wave of IoT devices — especially wearables — has quickly commoditized, driven b... » read more

Reliability Definition Is Changing
By Ed Sperling - 12 Feb, 2015 - Comments: 0

Since the invention of the integrated circuit, reliability has been defined by how long a chip continues to work. It either turned on and did what it was designed to do, or it didn't. But that definition is no longer so black-and-white. Parts of an SoC, or even an IP or memory block, can continue to function while other parts do not. Some may work intermittently, or at lower speeds. Others may ... » read more

Blog Review: Feb. 11
By Jesse Allen - 11 Feb, 2015 - Comments: 0

Ansys' Bill Vandermark flags the top five engineering articles of the week. Check out the one about the latest attempt at cold fusion, which left researchers hiding behind a blast shield. The solar-powered car named Stella drove away with the prestigious "Best Technology Achievement" award at the 8th annual Crunchies Awards this week. NXP's Maurice Geraets sounds like a proud parent – with... » read more

Leveraging Physically Aware Design-For-Test To Improve Area, Power, And Timing
By Cadence - 11 Feb, 2015 - Comments: 0

Increased pressures on design teams to deliver faster, smaller devices in less time has required EDA companies to develop an integrated methodology to incorporate physical design information during DFT synthesis. This solution must consider the placeable area (or size) of the circuit as well as routing blockages and hard macro placement locations. It must also be able to both model the wiring i... » read more

Software-Driven Verification (Part 3)
By Brian Bailey - 10 Feb, 2015 - Comments: 0

[getkc id="10" comment="Functional Verification"] has been powered by tools that require hardware to look like the kinds of systems that were being designed two decades ago. Those limitations are putting chips at risk and a new approach to the problem is long overdue. Semiconductor Engineering sat down with Frank Schirrmeister, group director, product marketing for System Development Suite at [... » read more

The Week In Review: Design/IoT
By Jesse Allen - 06 Feb, 2015 - Comments: 0

Mergers & Acquistions Silicon Labs acquired Bluegiga Technologies Oy, providers of short-range wireless connectivity solutions and software for the IoT based in Espoo, Finland. Intel signed a definitive agreement to acquire Lantiq, a supplier of broadband access and home networking technologies based in Munich, Germany. Tools Mentor Graphics announced the addition of Automotive ... » read more

FD-SOI Meets The IoT
By Ann Mutschler - 05 Feb, 2015 - Comments: 1

Silicon-on-insulator manufacturing technology has been discussed for many years. IBM has used the partially depleted variation of SOI in its server products, but the fully depleted version has yet to find widespread adoption outside of mil/aero and automotive markets. That may change soon as applications in the Internet of Things ramp, given the requirements for ultra low power and low cost.... » read more

Blog Review: Feb. 4
By Jesse Allen - 04 Feb, 2015 - Comments: 0

After the Super Bowl, Ansys' Thierry Marchal looks at making football safer through virtual prototyping. Sports concussions are a serious danger for athletes from youths to professionals, and modeling head and brain impacts may lead not only to safer football helmets but a better understanding of how to lower the chance of brain injuries in sports. Synopsys' Ray Varghese continues his series... » read more

Back To The Future
By Ed Sperling - 02 Feb, 2015 - Comments: 0

The push to the next process node typically has meant that designs get simpler at existing and older nodes because the process technology is more mature and there have been so many chips developed at those nodes—many billions of them—that every possible corner case has been encountered hundreds, if not thousands, of times. That all makes sense in theory, but several key things have chang... » read more

The Week In Review: Design/IoT
By Ed Sperling - 30 Jan, 2015 - Comments: 0

Mergers/Acquisitions Lattice Semiconductor agreed to pay $600 million for Silicon Image, which makes connectivity solutions for high-definition content for mobile and consumer electronics. Lattice already makes programmable connectivity solutions, so the combined IP portfolio is expected to strengthen its position in wired and wireless markets. Tools Cadence expanded the tool portfolio it ... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2026 SMG   |  Terms of Service  |  Privacy Policy