Recent Developments in Neuromorphic Computing, Focusing on Hardware Design and Reliability


A new technical paper titled "Special Session: Neuromorphic hardware design and reliability from traditional CMOS to emerging technologies" was published by researchers at Univ. Lyon, Ecole Centrale de Lyon, Univ. Grenoble Alpes, Hewlett Packard Labs, CEA-LETI, and Politecnico di Torino. Abstract "The field of neuromorphic computing has been rapidly evolving in recent years, with an incre... » read more

Chip Industry’s Technical Paper Roundup: Apr. 4


New technical papers recently added to Semiconductor Engineering’s library: [table id=90 /] If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for us p... » read more

Neuromorphic Computing: Self-Adapting HW With ReRAMs


A new technical paper titled "A self-adaptive hardware with resistive switching synapses for experience-based neurocomputing" was published by researchers at Infineon Technologies, Politecnico di Milano and IUNET, Weebit Nano, and CEA Leti. Abstract "Neurobiological systems continually interact with the surrounding environment to refine their behaviour toward the best possible reward. Achie... » read more

Week In Review: Design, Low Power


The UK government published its National Quantum Strategy, which outlines the plan to invest £2.5 billion (~$3.0 billion) over the next 10 years into quantum technology, including computing, sensing, timing, imaging, and networking. "We will develop UK strengths across different hardware platforms, software, and components, and reinforce our capabilities throughout the supply chains. Although ... » read more

Deep Learning (DL) Applications In Photomask To Wafer Semiconductor Manufacturing


Published by the eBeam Initiative Member Companies (February 2023), this list of artificial intelligence (AI) systems used by member companies in their semiconductor manufacturing products shows progress. New examples of systems using AI include: image processing and parameter tuning in lithography tool mask metrology system B-SPline Control Point generation tool sem... » read more

Chip Industry’s Technical Paper Roundup: Dec. 13


New technical papers added to Semiconductor Engineering’s library this week.[table id=70 /] If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for us po... » read more

New Method to Measure, At The Wafer Scale, Direct Bonding Energies (CEA-LETI)


A new technical paper titled "Double cantilever beam bonding energy measurement using confocal IR microscopy" was published by researchers at Univ. Grenoble Alpes, CEA-LETI and SOITEC, Parc Technologique des Fontaines. "A new technique is assessed in order to measure, at the wafer scale, direct bonding energies. It is derived from the standard Double Cantilever Beam (DCB) method and uses int... » read more

Week In Review: Manufacturing, Test


The more than 1,400 attendees at this week’s IEDM, which celebrated the 75th anniversary of the transistor, were clearly focused on making the next 75 years of semiconductors even more remarkable than the last. Intel, Samsung, TSMC, STMicroelectronics, GlobalFoundries and imec announced breakthrough devices, materials, and even integration approaches. These included: Intel showcased adva... » read more

Week In Review: Design, Low Power


Tools, IP, design Codasip launched a new organization within the company to support the development and commercialization of technical innovations in key applications including security, functional safety, and AI/ML. "As semiconductor scaling is showing its limits, there is an obvious need for new ways of thinking. We will be working with universities, research institutes and strategic partner... » read more

Chip Industry’s Technical Paper Roundup: Nov. 15


New technical papers added to Semiconductor Engineering’s library this week. [table id=63 /] » read more

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