CDC Methodology For Fast-To-Slow Clocks


CDC checking of any asynchronous clock domain crossing requires that the data path and the control path be identified and that the receive clock domain data flow is controlled by a multiplexer with a select line that is fed by a correctly synchronized control line.  Meridian CDC identifies all the data and associated control paths in a design and will ensure that the control signals passing fr... » read more

Executive Briefing: Prakash Narain


Real Intent CEO Prakash Narain talks with System-Level Design about where are the pain points in verification; different types of signoff; the impact of third-party IP, and can the tools industry keep up with the rising complexity in semiconductor design. [youtube vid=C25VMRDXGAQ] » read more

The Week In Review: June 21


By Ed Sperling Mentor Graphics rolled out emulation-ready verification IP for MIPI camera and display-based protocols. The VIP enables stimuli generated by UVM and SystemC-based environments and applies them to a design under test (DUT) running in the emulator. Synopsys introduced a tool for implementing and verifying functional engineering change orders, including matching, visualization ... » read more

Clock Domain Crossing Demystified


A look at the second-generation solution for CDC verification. To download this white paper, click here. » read more

Clock And Reset Ubiquity: A CDC Verification Perspective


Today’s SoC integrates a collection of peripherals, memory, graphics, networking and I/O components that originate from a multitude of sources. It could comprise designs from within the company, from other companies or from third-party IP vendors. These independently developed components come together to enable a rich feature set for the SoC. However, accompanying this abundance of features i... » read more

Clocks And Bugs


In late September, I blogged about the results of the 2012 DAC survey on CDC bugs, X propagation, and timing constraints by Real Intent. Now for those of you who don't remember what CDC means, it is an acronym for clock domain crossing. In modern SoCs, the number of different clock domains can easily exceed 100, due to the integration of different blocks and IP, each with their own clock. Not ... » read more

Challenges In Verification Of Clock Domain Crossings


Emerging systems have three dimensions of complexity when it comes to making them CDC-safe. First, the number of asynchronous clock domains in designs can range from the tens to the hundreds for complex systems with many components. Second, the master clock frequencies vary per component. It is not uncommon for the ratio between the fastest and the slowest clocks to be greater than 10. Third, t... » read more

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