Week in Review – IoT, Security, Autos

By Jeff Dorsch - 04 Oct, 2019 - Comments: 0

Products/Services Cadence Design Systems is working with Adesto Technologies to grow the Expanded Serial Peripheral Interface (xSPI) communication protocol ecosystem, for use in Internet of Things devices. The Cadence Memory Model for xSPI allows customers to ensure optimal use of the octal NOR flash with the host processor in an xSPI system, including support for Adesto’s EcoXiP octal xSPI ... » read more

Week in Review: IoT, Security, Autos

By Jeff Dorsch - 26 Jul, 2019 - Comments: 0

Products/Services Siemens announced that Mazda Motor adopted the Capital electrical design software suite from Mentor, a Siemens Business, for the design of next-generation automotive electrical systems. Mazda is said to use Capital for model-based generative design for the electrical and electronic systems of the entire vehicle platform. Synopsys will host the 11th annual Codenomi-con USA ... » read more

The Week In Review: IoT

By Jeff Dorsch - 29 Sep, 2017 - Comments: 0

Connectivity Sigfox this week held the first annual Sigfox World IoT Expo in Prague, Czech Republic, bringing together network operators, business partners, and industry professionals. The company announced a number of new services for its users, including the Admiral Ivory connectivity service, which promises to make any short-range wireless device into a long-range Internet of Things device,... » read more

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

NAND Flash Targets 1,000 Layers

New techniques go beyond improved deposition and etching, but challenges stack up, too.

by Bryon Moyer

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: Comodo

Week in Review – IoT, Security, Autos

Week in Review: IoT, Security, Autos

The Week In Review: IoT