Wire-Friendly Domain-Specific Processor for Angstrom-Era Nodes with High Core Density (Politecnico di Torino, imec et al.)


A new technical paper titled "Physical Design Exploration of a Wire-Friendly Domain-Specific Processor for Angstrom-Era Nodes" was published by researchers at Politecnico di Torino, EPFL, National Technical University of Athens and imec. Abstract "This paper presents the physical design exploration of a domain-specific processor (DSIP) architecture targeted at machine learning (ML), address... » read more