Week In Review: Design, Low Power

By Jesse Allen - 03 Sep, 2021 - Comments: 0

Synaptics will acquire DSP Group, a provider of voice and wireless chipset solutions for converged communications, at $22.00 per share in an all-cash transaction. The deal is worth $538 million. "We continue to invest in technologies that tilt our product mix toward IoT applications," said Michael Hurlston, President and CEO of Synaptics. "DSP Group's expertise in SmartVoice and ULE wireless so... » read more

Week In Review: Design, Low Power

By Jesse Allen - 11 Sep, 2020 - Comments: 0

Silvaco acquired the assets of Coupling Wave Solutions (CWS), including IP, patents, and analysis technologies. CWS provides tools for system-level interference analysis of complex SoCs that integrate analog, RF, and digital blocks. Silvaco said that the acquisition expands the company’s portfolio to address RF SOI (Silicon on Insulator) substrate analysis to accurately model and simulate noi... » read more

Week In Review: Auto, Security, Pervasive Computing

By Susan Rambo - 11 Sep, 2020 - Comments: 0

Synopsys announced an electronic and photonic co-design platform for photonic integrated circuit (PIC) design, layout implementation, and verification. The OptoCompiler provides schematic-driven layout and advanced photonic layout synthesis in the same platform. AI Rambus says it clocked 4.0 Gbps on its HBM2E memory interface (PHY and controller), which is a desirable speed for AI/ML traini... » read more

Knowledge Centers
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Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

NAND Flash Targets 1,000 Layers

New techniques go beyond improved deposition and etching, but challenges stack up, too.

by Bryon Moyer

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

New AI Processors Architectures Balance Speed With Efficiency

Hot Chips 24: Large language models ratchet up pressure for sustainable computing and heterogeneous integration; data management becomes key differentiator.

by Ed Sperling

tag: DSP Group

Week In Review: Design, Low Power

Week In Review: Design, Low Power

Week In Review: Auto, Security, Pervasive Computing

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