Information Flow Verification Framework Integrating Static and Formal Verification Methods At The Pre-Silicon Stage (U. of Florida)


Researchers from University of Florida published "IFV: Information Flow Verification at the Pre-silicon Stage Utilizing Static-Formal Methodology." Abstract "Modern system-on-chips (SoCs) are becoming prone to numerous security vulnerabilities due to their ever-growing complexity and size. Therefore, a comprehensive security verification framework is needed at the very early stage of the ... » read more

Overview Of Security Verification Methodologies for SoC Designs Pre-Silicon (U. of Florida)


A technical paper titled "A Survey on SoC Security Verification Methods at the Pre-silicon Stage" was recently published by researchers at University of Florida. Abstract "This paper presents a survey of the state-of-the-art pre-silicon security verification techniques for System-on-Chip (SoC) designs, focusing on ensuring that designs, implemented in hardware description languages (HDLs) a... » read more