Enabling A Critical Phase in SoC Development


High speed execution of an SoC model on an FPGA-based prototyping system is essential—both to permit development and verification of the full software stack and to understand hardware/software interactions—before silicon is available. But for SoC designs that include high-speed, voluminous I/O, it is equally essential that the prototype be exercised with large amounts of real-world I/O o... » read more

Power Estimation: Early Warning System Or False Alarm?


Semiconductor Engineering sat down with a large panel of experts to discuss the state of power estimation and to find out if the current levels of accuracy are sufficient to being able to make informed decisions. Panelists included: Leah Schuth, director of technical marketing in the physical design group at [getentity id="22186" comment="ARM"]; Vic Kulkarni, senior vice president and general m... » read more