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Real Highlights For Virtual DAC 2020


My first time at DAC was in 2006 in San Francisco. I was mesmerized by it: so many people, so much cool technology, so much fun with weird giveaways, raffles, happy hours, the Denali party and Disco Inferno at the legendary Fillmore. DAC is the most important, comprehensive conference for anyone developing integrated circuits (ICs) and systems-on-chips (SoCs). With an incredible list of ... » read more

FPGA Equivalence Checking For A Nuclear Safety Controller


Every chip development team wants to find and fix all the bugs they possibly can in pre-silicon verification. Turning a chip to fix issues found in the bring-up lab incurs high costs and product delays; bugs found in the field are even more expensive to repair. But for some applications, including military/aerospace, implanted medical devices, and autonomous vehicles, the consequences of a faul... » read more

OneSpin Users Gather in Munich


Even more than most other high-tech companies, EDA vendors rely on their users for many aspects of their success. Of course, customers provide the revenue that fuels the business, but their influence goes far beyond that. Many features in EDA tools, and even entire categories of products, arise from working closely with advanced users. Even before traditional Beta-testing, selected users provid... » read more

Week in Review – IoT, Security, Autos


Products/Services Cadence Design Systems is working with Adesto Technologies to grow the Expanded Serial Peripheral Interface (xSPI) communication protocol ecosystem, for use in Internet of Things devices. The Cadence Memory Model for xSPI allows customers to ensure optimal use of the octal NOR flash with the host processor in an xSPI system, including support for Adesto’s EcoXiP octal xSPI ... » read more