AI Chips Driving Need For New Test Implementation Methodologies


Artificial intelligence has never been more in the news than it is today.  From picking stock market investments to autonomous driving, we have heard about what AI can do when it works and what happens when it goes awry. The consequences are huge if AI doesn’t work which puts a lot of pressure on hardware engineers to ensure that their chips can be extensively tested for proper and safe func... » read more

The Single Best DFT Move You Can Make


A proven method to simplify a complex problem is to break it into smaller chunks. In the case of today’s large, complex SoCs, this means using hierarchical methods to design the blocks, then combine the results at the top level. While this sounds obvious, it hasn’t always been practical or technologically feasible to perform some tasks, like DFT, at the block level and translate that work s... » read more

Test Challenges Grow


Semiconductor Engineering sat down to discuss current and future test challenges with Dave Armstrong, director of business development at Advantest; Steve Pateras, product marketing director for Silicon Test Solutions at Mentor Graphics; Robert Ruiz, senior product marketing manager at Synopsys; Mike Slessor, president of FormFactor; and Dan Glotter, chief executive of Optimal+. SE: In our ... » read more