Blog Review: June 10

By Jesse Allen - 10 Jun, 2020 - Comments: 0

Cadence's Paul McLellan considers the issues around benchmarking neural networks running on different hardware and challenges in comparing designs. Mentor's Shivani Joshi points to a few of the different types of jitter and some key factors to review when trying to limit jitter. Synopsys' Fred Bals notes that while the National Vulnerability Database is a good source for information on public... » read more

Week in Review: IoT, Security, Auto

By Jeff Dorsch - 08 Mar, 2019 - Comments: 0

Internet of Things Dialog Semiconductor is shifting its product portfolio away from smartphones following its pending $600 million deal with Apple. The chip company is looking toward connected-health products and video-game consoles for future growth. The connected-health devices, developed in collaboration with pharmaceutical firms, would monitor blood pressure and check glucose levels, accor... » read more

The Week In Review: Manufacturing

By Mark LaPedus - 03 Feb, 2017 - Comments: 0

Manufacturing Veeco Instruments has signed a definitive agreement to acquire Ultratech. With the deal, Veeco will enter into the lithography market for chip-packaging as well as the laser spike anneal business. Veeco is a supplier of MOCVD tools. The implied total transaction value is approximately $815 million and the implied enterprise value is approximately $550 million. FlexTech, a SE... » read more

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

NAND Flash Targets 1,000 Layers

New techniques go beyond improved deposition and etching, but challenges stack up, too.

by Bryon Moyer

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

New AI Processors Architectures Balance Speed With Efficiency

Hot Chips 24: Large language models ratchet up pressure for sustainable computing and heterogeneous integration; data management becomes key differentiator.

by Ed Sperling

tag: ITN Energy Systems

Blog Review: June 10

Week in Review: IoT, Security, Auto

The Week In Review: Manufacturing