Stacked Ferroelectric Memory Array Comprised Of Laterally Gated Ferroelectric Field-Effect Transistors


A technical paper titled “Laterally gated ferroelectric field effect transistor (LG-FeFET) using α-In2Se3  for stacked in-memory computing array” was published by researchers at Samsung Electronics and Sungkyunkwan University. Abstract: "In-memory computing is an attractive alternative for handling data-intensive tasks as it employs parallel processing without the need for data transfe... » read more

FeFET Multi-Level Cells For In-Memory Computing In 28nm


A technical paper titled “First demonstration of in-memory computing crossbar using multi-level Cell FeFET” was published by researchers at Robert Bosch, University of Stuttgart, Indian Institute of Technology Kanpur, Fraunhofer IPMS, RPTU Kaiserslautern-Landau, and Technical University of Munich. Abstract: "Advancements in AI led to the emergence of in-memory-computing architectures as a... » read more