Identifying Read Disturbance Threshold of DRAM Chips (ETH Zurich, Rutgers)


A new technical paper, "DiscoRD: An Experimental Methodology for Quickly Discovering the Reliable Read Disturbance Threshold of Real DRAM Chips," was published by ETH Zurich and Rutgers University. Abstract "State-of-the-art DRAM read disturbance mitigations rely on the read disturbance threshold (RDT) (e.g., the number of aggressor row activations needed to induce the first read disturba... » read more

Setting The Memory Controller Free From Managing DRAM Maintenance Ops (ETH Zurich)


A new technical paper titled "A Case for Self-Managing DRAM Chips: Improving Performance, Efficiency, Reliability, and Security via Autonomous in-DRAM Maintenance Operations" was published by researchers at ETH Zurich. Abstract: "The rigid interface of current DRAM chips places the memory controller completely in charge of DRAM control. Even DRAM maintenance operations, which are used to en... » read more