tag: Mentor

Mining For Data
By Ed Sperling - 09 Aug, 2012 - Comments: 0

By Ann Steffora Mutschler Power analysis accuracy at the RTL design abstraction is a challenging problem. Smaller geometries just make the challenge of predicting accurate RTL power consumption even more difficult, which in turn impacts other design decisions such as power-grid planning and package selection. “It’s one of these things where the earlier you are in the design, even befo... » read more

The New Frontier: Low-Power Verification And Test
By Ed Sperling - 09 Aug, 2012 - Comments: 0

By Ann Steffora Mutschler By now there’s no argument that verification and test strategies must be considered at the very earliest stages of any design cycle, and when it comes to low-power designs, the advanced techniques used and design complexity make the challenges here even more daunting. Low-power verification and test strategies have been in development for a number of years, and it... » read more

What’s ST’s FD-SOI Technology All About?
By Various Writers - 22 Jun, 2012 - Comments: 0

As I blogged here on SemiMD last week, STMicroelectronics has announced that to supplement in-house production at their fab in Crolles, the company has tapped GlobalFoundries for high-volume production of 28nm then 20nm FD-SOI mobile devices.  ST will also open access to its FD-SOI technology to GlobalFoundries’ other customers.  High-volume manufacturing will kick off with ST-Ericsson’s ... » read more

2.5D Leverages Existing Tools On The Way To 3D
By Ed Sperling - 05 Apr, 2012 - Comments: 0

By Ann Steffora Mutschler As design and manufacturing issues with true 3D design continue to be worked out, interim 2.5D technologies are moving ahead as engineering teams leverage this packaging-driven approach to manage heat, cost, area and yield. Technologies such as Wide I/O memory support 2.5D, and when combined with logic they allow engineering teams to realize a performance increase,... » read more

CMP, ST et al offer 28nm FD-SOI for prototyping, research
By Various Writers - 06 Nov, 2011 - Comments: 0

Posted by Adele Hars, Editor-in-Chief, Advanced Substrate News ~  ~ What would a port to 28nm FD-SOI do for your design?  A recent announcement by CMP, STMicroelectronics and Soitec invites you to find out.  Specifically, ST’s CMOS 28nm Fully Depleted Silicon-On-Insulator (FD-SOI) process – which uses innovative silicon substrates from Soitec and incorporates robust, compact model... » read more

Experts At The Table: Multi-Foundry Strategies
By Ed Sperling - 22 Aug, 2011 - Comments: 0

By Ed Sperling Semiconductor Manufacturing and Design sat down with Walter Ng, vice president of the IP ecosystem at GlobalFoundries; John Murphy, director of strategic alliances marketing at Cadence; Michael Buehler-Garcia, director of Calibre design solutions marketing at Mentor Graphics; Bob Smith, vice president of marketing and business development at Magma, and Linh Hong, vice president ... » read more

2.5D Stacking And Test
By Ed Sperling - 06 Jul, 2011 - Comments: 0

Michael Buehler-Garcia, director of Calibre Design Solutions marketing at Mentor Graphics, talks about the challenges in building 2.5D stacks and how testing them will become a major headache. [youtube vid=tLKdOo5L8C8] » read more

Experts At The Table: Multi-Foundry Strategies
By Ed Sperling - 27 Jun, 2011 - Comments: 0

By Ed Sperling Semiconductor Manufacturing and Design sat down with Walter Ng, vice president of the IP ecosystem at GlobalFoundries; John Murphy, director of strategic alliances marketing at Cadence; Michael Buehler-Garcia, director of Calibre design solutions marketing at Mentor Graphics; Bob Smith, vice president of marketing and business development at Magma, and Linh Hong, vice president ... » read more

Multisourcing Options
By Ed Sperling - 27 Jun, 2011 - Comments: 0

Semiconductor Manufacturing & Design discusses the ability to move chip designs from one foundry to another with Walter Ng of Global Foundries, Michael Buehler-Garcia of Mentor Graphics, John Murphy of Cadence and Ling Hong of Kilopass. [youtube vid=1YxYKmfL4SE] » read more

IC Yield Issues
By Ed Sperling - 27 May, 2011 - Comments: 0

What makes one semiconductor design yield better than another. And what issues are we likely to face going forward. Semiconductor Manufacturing & Design questions Amiad Conley from Applied Materials; Cyrus Tabery from GlobalFoundries; Brady Benware from Mentor Graphics, and Ankush Oberai from Magma. [youtube vid=1YjY436YmNQ] » read more

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