tag: Mentor

The Problem With Clocks
By Brian Bailey - 13 Apr, 2017 - Comments: 1

The synchronous digital design paradigm has enabled us to design circuits that are well controlled, but that is only true if the clocks themselves are well controlled. While overdesign techniques ensured that to be the case in early ASIC development, designs today cannot afford such luxuries. As we strive for lower power and higher operating frequencies, the clock has become a critical desig... » read more

Working With Custom Checkers In Dynamic Simulation Of Low Power Designs
By Progyna Khondkar - 13 Apr, 2017 - Comments: 0

Power-aware simulators can provide a wide range of automated assertions in the form of dynamic sequence checkers that cover every possible PA dynamic verification scenario. However, design specific PA verification complexities may arise from adoption of one or a multiple of power dissipation reduction techniques, from a multitude of design features — like UPF strategies — as well as from ta... » read more

Managing Voltage Drop At 10/7nm
By Ann Mutschler - 13 Apr, 2017 - Comments: 0

Power integrity is becoming a bigger problem at 10/7nm because existing tools such as static analysis no longer are sufficient. Power integrity is a function of static and dynamic voltage drop in the power delivery network. And until recently, static analysis did an effective job in measuring the overall robustness of PDN connectivity. As such, it is a proxy for PDN strength. The problem is ... » read more

Electric Vehicles Set The Pace
By Gale Morrison - 13 Apr, 2017 - Comments: 0

Electric vehicles are leading the charge for innovation in automotive electronics. Companies that invested and embraced the challenge of EVs are besting their less-nimble, less-open-minded engineering cohorts. Semiconductors and embedded computers have been controlling the dashboard, mirrors, seats, heating and cooling for years. But with EVs, engineering teams are starting to tackle tas... » read more

Speeding Up The Design Process
By Ed Sperling - 28 Jul, 2016 - Comments: 0

A rush to plant a stake in new markets, coupled with uncertainty about how to generate a reasonable return on investment in those markets, is ratcheting up pressure on chipmakers. They now must come up with more customized solutions in less time, frequently in smaller volumes, and with the ability to modify them in shorter time spans if market opportunities shift in unexpected ways. This aff... » read more

The Week In Review: Manufacturing
By Mark LaPedus - 13 Nov, 2015 - Comments: 0

IC Insights released its preliminary top IC rankings in terms of sales for 2015. In the rankings, Intel remains in first place in terms of chip sales in 2015, followed by Samsung and TSMC. GlobalFoundries and UMC also moved up in the rankings. Beyond that, the market is in flux. “The pending mergers of Avago and Broadcom and NXP and Freescale will have a significant impact on future top-20 ra... » read more

The Week In Review: Manufacturing
By Mark LaPedus - 10 Jul, 2015 - Comments: 0

An alliance led by IBM Research has produced the semiconductor industry’s first 7nm test chips with functioning transistors. The breakthrough, accomplished in partnership with GlobalFoundries and Samsung at SUNY Polytechnic Institute’s Colleges of Nanoscale Science and Engineering, could result in the ability to place more than 20 billion tiny switches, or transistors, on a chip. There i... » read more

Blog Review: March 11
By Jesse Allen - 11 Mar, 2015 - Comments: 0

How are sensors like a scallop's eyes? Rambus' Patrick Gill guides you through day in the life of the mollusk to show how inspiration for IoT was found in the sea. Cadence's Dimitry Pavlovsky discusses some of the intricacies associated with creating VIP for processor interconnect systems such as CHI, and how other tools are necessary to complete the task. Following Google's warning of a ... » read more

The Week In Review: Manufacturing
By Mark LaPedus - 28 Feb, 2014 - Comments: 0

SPIE Advanced Lithography is a patterning show. At the event, however, Applied Materials revealed more details regarding its selective materials removal opportunity, according to Weston Twigg, an analyst with Pacific Crest Securities, in a research note. Applied Materials presented a paper entitled, “Where Is Plasma Etching Going from Here?” “The presenter outlined concepts for thin layer... » read more

Calculating Emulation’s Complex Cost Of Ownership
By Ed Sperling - 25 Oct, 2012 - Comments: 0

By Ann Steffora Mutschler Hardware emulation or hardware-assisted verification –whichever term you choose—has been around for decades. But until recently it has seen only modest adoption due to the high cost, long set-up time, power and IT requirements, among other things. But with simulation running out of steam between 50 and 100 million gates, this specialized hardware makes a ... » read more

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