tag: PLDA

The Week In Review: Design

By Jesse Allen - 24 Jun, 2016 - Comments: 0

Tools & IP Synopsys uncorked PHY and Controller IP for PCI Express 4.0 architecture, which the company says reduces latency by up to 20% and area by 15% compared to the previous implementation. The IP supports lane margining to assess performance variation tolerance. PLDA announced a PCIe 4.0 development platform, and provides a PCIe 3.0-x8 (upstream) to PCIe 4.0-x4 (downstream) Integ... » read more

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