Do Parallel Tools Make Sense?


Semiconductor Engineering sat down to talk about parallelization efforts within EDA with Andrea Casotto, chief scientist for Altair; Adam Sherer, product management group director in the System & Verification Group of Cadence; Harry Foster, chief scientist for Mentor, a Siemens Business; Vladislav Palfy, global manager for applications engineering at OneSpin; Vigyan Singhal, chief Oski for ... » read more

The Week In Review: Design/IoT


Mergers & Acquisitions Cadence acquired [getentity id="22444" comment="Rocketick"], an Israel-based company focused on multicore parallel simulation. Founded in 2008, their original rise and claim to fame was acceleration on GPUs, having received significant funding from Nvidia. The deal is expected to close in the second quarter of fiscal 2016, and terms were not disclosed. Tools &am... » read more

GPUs May Speed UP EDA Algorithms


The sequential EDA algorithms of old cannot keep pace with increasing design complexity, which is driving the industry to look at parallelism and other computational architectures such as the graphical processing unit (GPU). A 10X or 20X speedup for gate-level simulations means that a test that runs today in a week will run in less than a day, and a test that runs today in a month will run i... » read more