tag: Siemens

True Costs Of Process Node Migration
By Mentor, a Siemens Business - 09 Oct, 2017 - Comments: 0

Deciding when and how to make a process node transition is critical to business success. The solution that requires the least amount of total change—in the form of license configurations, required hardware resources, necessary tool qualifications, and adequate support infrastructure—will always be the most “inexpensive” option. Do you have all the information you need to make the right ... » read more

IoT Security: Technology Is Only One Part Of The Equation
By Warren Kurisu - 05 Oct, 2017 - Comments: 0

Survey after survey on the adoption of the IoT punctuates that security and data privacy continue to be the top concerns with any new implementation. It used to be that security was all about protecting data (business, personal ID, etc.), but as more devices are connected to the IoT, security concerns reach far beyond just the value inherent in the data. According to Gartner, nearly 5.5 ... » read more

Functional Safety Issues Rising
By Ed Sperling - 05 Oct, 2017 - Comments: 0

Developing semiconductors for safety-critical markets such as automotive, industrial and medical involves a growing list of extra steps that need to be taken pre- and post-manufacturing to ensure product integrity, reliability and security. This is causing several significant changes: • Designs are becoming much more complicated because they require such features as failover and redundan... » read more

Fusing CMOS IC And MEMS Design For IoT Edge Devices
By Mentor, a Siemens Business - 04 Oct, 2017 - Comments: 0

Creating a sensor-based IoT edge device is challenging, due to the multiple design domains involved (Analog, digital, RF, and MEMS). But, creating an edge device that combines the electronics using the traditional CMOS IC flow and a MEMS sensor on the same silicon die can seem impossible. In fact, many IoT edge devices combine multiple dies in a single package, separating electronics from the M... » read more

Starting Point Is Changing For Designs
By Ed Sperling - 04 Oct, 2017 - Comments: 0

The starting point for semiconductor designs is shifting. What used to be a fairly straightforward exercise of choosing a processor based on power or performance, followed by how much on-chip versus off-chip memory is required, has become much more complicated. This is partly due to an emphasis on application-specific hardware and software solutions for markets that either never existed befo... » read more

Blog Review: Oct. 4
By Jesse Allen - 04 Oct, 2017 - Comments: 0

Synopsys' Prishkrit Abrol digs into how USB Type-C Alternate Mode allows MHL, DisplayPort, HDMI, and Thunderbolt over cable. Mentor's Paul Morrison dives into how hardware emulation can help verify the complexities of new storage devices. Cadence's Madhavi Rao listens in as Somshubhro Pal Choudhury of Bharat Innovations describes the IoT stack, hype cycle, and why it's happening now. R... » read more

Prototypes Proliferate
By Brian Bailey - 02 Oct, 2017 - Comments: 0

Hardware prototyping and [getkc id="30" kc_name="emulation"] have been two sides of the same coin ever since the [gettech id="31071" comment="FPGA"] became a commercial success. Early emulators were all built from FPGAs, and most were used in-circuit, much like prototypes are today. More recently, emulation has become a major piece of the [getkc id="10" kc_name="verification"] flow, to the poin... » read more

The Week In Review: Design
By Jesse Allen - 29 Sep, 2017 - Comments: 0

M&A Imagination will sell its MIPS business to Tallwood, a California-based venture capital firm, for $65m in cash. The sale is expected to close in October. The rest of Imagination is slated to be sold to Canyon Bridge for £550 million in cash (~$740 million), a deal dependent on the MIPS sale. The Chinese-backed investment firm has featured recently in the news for its attempted purchas... » read more

Get To Know The Gate-Level Power Aware Simulation
By Progyna Khondkar - 28 Sep, 2017 - Comments: 1

The post-synthesis gate-level netlist (GL-netlist) based PA simulation input requirements are mostly the same as RTL simulation. However, the design under verification here is the GL-netlist from synthesis, so logic gates from standard, MV and Macro cell Liberty libraries are already inserted or instantiated in the design. Hence power aware simulation (PA-SIM) at post-synthesis also requires Li... » read more

System Coverage Undefined
By Brian Bailey - 28 Sep, 2017 - Comments: 1

When is a design ready to be taped out? That has been one of the toughest questions to confront every design team, and it's the one verification engineers lose sleep over. Exhaustive [getkc id="56" kc_name="coverage"] has not been possible since the 1980s. Several metrics and methodologies have been defined to help answer the question and to raise confidence that important aspects of a block... » read more

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