tag: Synopsys

The Race To Secure The Car
By Ann Mutschler - 07 Apr, 2016 - Comments: 0

A shift is underway in the automotive industry to connect cars to each other and to a variety of communications infrastructure, adding many of the features that consumers now expect in mobile devices as well as some new ones that ultimately will lead to autonomous vehicles. But along with those changes are some nagging questions about just how safe that technology will be for consumers and othe... » read more

Blog Review: April 6
By Jesse Allen - 06 Apr, 2016 - Comments: 0

A wall of underground ice is being built to contain contaminated water runoff from the Fukushima nuclear power plant and Swedish researchers want to make windowpanes out of wood, in this week's top tech picks from Ansys' Justin Nescott. Plus, if you're concerned about being spied on by aliens, there's a way the earth could hide. Mentor's Andrew Macleod digs into the problems of centralizing ... » read more

Are Simulation’s Days Numbered?
By Brian Bailey - 06 Apr, 2016 - Comments: 3

Semiconductor Engineering sat down to discuss the limitations of simulation in more complex designs with [getperson id="11049" comment="Michael McNamara"], CEO of [getentity id="22716" comment="Adapt-IP”]; Pete Hardee, product management director at [getentity id="22032" e_name="Cadence"]; David Kelf, vice president of marketing for [getentity id="22395" e_name="OneSpin Solutions"]; Lauro Riz... » read more

The Week In Review: Design/IoT
By Jesse Allen - 01 Apr, 2016 - Comments: 0

Tools Synopsys unveiled a new custom design solution targeting FinFET layout, introducing visually-assisted routing automation, a built-in design rule checking engine, templates to apply previous layout decisions to new designs, and IC Compiler integration. TSMC certified the new tool for 10nm and 7nm FinFET process technologies. It has also been adopted by STMicroelectronics, GSI Technology... » read more

EDAC Changes Name
By Ed Sperling - 31 Mar, 2016 - Comments: 1

The EDA Consortium today changed its name to the Electronic System Design Alliance, a move that expands the group's charter to reflect shifts that have been underway in the chip design world for some time. Those shifts include the growth in IP and an increased focus on software development. Classic EDA, from place and route to synthesis to back-end debug and verification, are still very much... » read more

Blog Review: March 30
By Jesse Allen - 30 Mar, 2016 - Comments: 0

Are we in a new wave of formal? Mentor's Joe Hupcey III highlights several things from DVCon that indicate formal is becoming a cornerstone of mainstream verification flows. Synopsys' Graham Etchells continues his search for more ways to bring greater efficiency to the FinFET layout process, and the downsides to custom routing solutions. Cadence's Paul McLellan takes a look at TSMC's rapi... » read more

Planes, Cars, And Lagging Standards
By Ed Sperling - 28 Mar, 2016 - Comments: 0

Automotive and aerospace standards are struggling to adapt to pervasive connectivity, increased functionality, and new packaging approaches and architectures, leaving chipmakers and systems vendors unsure about what needs to be included in future designs. Each of these markets has a reputation for being lumbering and unresponsive, in part because they deal with safety-critical issues and i... » read more

The Week In Review: Design/IoT
By Jesse Allen - 25 Mar, 2016 - Comments: 0

Numbers EDA sales dropped 1.9% in Q4 of 2015, following a spectacular run of 23 consecutive quarters of solid growth, according to EDAC. For the year, the EDA and IP industry posted 5% growth. At the same time, IP revenue grew 9.2% to $702.2 million, making it the first time ever that IP surpassed CAE revenue. Services revenue also grew 5.4% year over year to 107.1 million. A new report f... » read more

Pain Points At 7nm
By Ed Sperling - 24 Mar, 2016 - Comments: 3

Early work has begun on 7nm. Process technology has progressed to the point where IP and tools are being qualified. There is still a long way to go. But as companies begin engaging with foundries on this process node—[getentity id="22586" comment="TSMC"] is talking publicly about it, but [getentity id="22846" e_name="Intel"], [getentity id="22819" comment="GlobalFoundries"] and [getentity ... » read more

An Unsustainable Divide
By Brian Bailey - 24 Mar, 2016 - Comments: 0

One of the great things about attending DVCon, or any other conference for that matter, is the networking. You get to see so many people who are eager to learn, to talk and to share ideas. When this happens, you tend to hear a lot of statements that have to rattle around in your mind for a while before you can start to make sense of them and see if any coherent themes emerge. By themes, I am... » read more

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