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Improving VHDL


For the past several years, I have had the privilege to chair the IEEE 1076 VHDL working group. In March, we handed off the revisions to the VHDL LRM to our technical editor to finalize the document for balloting. As we are waiting for the standards process to finish up, I thought I would share my favorite new additions. Let me start with an executive summary: VHDL-2017 plus Open Source VHDL... » read more

Blog Review: July 19


Synopsys' Prishkrit Abrol provides a detailed explanation of how the USB Type-C connector works. Mentor's Ricardo Anguiano examines how the RISC-V ecosystem is expanding and latest developments in the open source toolchain. Cadence's Gopi Krishnamurthy explains the lane margining requirements of the PCIe 4.0 specification. ARM's Chet Babla unravels some claims about Narrowband IoT, Cat... » read more