Technical Paper Round-Up: July 18

DRAM & On-Die ECC; Speculative execution attack; functional Safety FPGA; ISO 26262; HW acceleration; dark semiconductors; power management; spin manipulation; exponentially more computing power; hybrid emulation


New technical papers added to Semiconductor Engineering’s library this week.

Technical Paper Research Organizations
Enabling Effective Error Mitigation in Memory Chips That Use On-Die Error-Correcting Codes *Award Winner* ETH Zurich
RETBLEED: Arbitrary Speculative Code Execution with Return Instructions ETH Zurich
Evaluation of Directive-based Heterogeneous Redundant Design Approaches for Functional Safety Systems on FPGAs Nagasaki University
EmuNoC: Hybrid Emulation for Fast and Flexible Network-on-Chip Prototyping on FPGAs RWTH Aachen University and Otto-von-Guericke Universitat Magdeburg
The Importance of (Exponentially More) Computing Power MIT: CSAIL and Sloan School of Management
Safety-Oriented System Hardware Architecture Exploration in Compliance with ISO 26262 National Taipei University
FSHMEM: Supporting Partitioned Global Address Space on FPGAs for Large-Scale Hardware Acceleration Infrastructure KAIST and Flapmax
Exocompilation for productive programming of hardware accelerators MIT and UC Berkeley
Spin manipulation by giant valley-Zeeman spin-orbit field in atom-thick WSe2 Beihang University (China) and University of British Columbia
Low-Overhead Reinforcement Learning-Based Power Management Using 2QoSM ETH Zurich and Georgia Tech
Brightening of a dark monolayer semiconductor via strong light-matter coupling in a cavity Carl von Ossietzky University of Oldenburg (Germany), University of Iceland, the University of Würzburg (Germany), Friedrich Schiller University (Germany), Arizona State University (USA) and the National Institute for Materials Science in Tsukuba (Japan) and others

Semiconductor Engineering is in the process of building this library of research papers. Please send suggestions (via comments section below) for what else you’d like us to incorporate. If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for us posting links to papers.

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