Why the normal shift to hardened logic doesn’t necessarily apply.
Field-programmable gate arrays (FPGAs) thrive in rapidly evolving new markets before being replaced by hard-wired ASICs, but in automotive that crossover is likely to happen significantly later than in the past.
Historically, FPGAs have held temporary positions until volumes increased enough to cost-reduce the FPGAs out in favor of a hardened version. With automobiles, there are so many changes ahead as cars migrate from mechanical to assisted driving, and ultimately autonomous driving, that the shift could take a lot longer.
“This is what every car company has to do in their own calculations if they’re starting with an FPGA,” said Joe Mallett, senior marketing manager at Synopsys. “At what point does it make sense to convert it to an ASIC?”
The automotive market is different from other markets, though. Development times are long, so work done today won’t see the road for at least a few more years. And it may be a decade before design requirements and expectations settle in. That keeps FPGAs in play for quite some time. In addition, safety-related validation may neutralize any costs saved by moving to an ASIC.
FPGAs’ strength lies in the fact that a developer can build a custom design using a software language and have that design implemented in the FPGA hardware. Implementing a standard for which there’s no dedicated silicon? No problem. Put it into an FPGA. Got a jump start on a new standard with an FPGA prototype, and now the standard has been tweaked before release? No problem. Make the change in the FPGA.
This has played out for decades in many developing markets, starting with communications and, more recently, the data center. It is well understood that one makes tradeoffs to use an FPGA. They aren’t the cheapest devices, because it takes silicon to provide for all of the programmability. They tend to have somewhat slower speed than other devices built on the same process node, because all of the interconnect switches slow signals down more than plain wire would. And they have tended to consume more energy than other devices on the same node.
But the upside has been well worth it. ASICs are expensive to develop, and they take a long time to bring to market. Systems on a chip (SoCs) are even more complex, but SoC-like FPGAs, with hardened processors and communications PHYs, provide a much quicker-turn option than designing dedicated silicon.
The big question always has been whether an application would ramp up to high enough volumes to make converting to a hardened version worthwhile. Often, the sale of an FPGA would come with the expectation that it would be used to get a foothold in the market and then be cost-reduced out.
But many times, those volumes didn’t quite materialize, and the FPGA remained in place. Or perhaps volume was achieved, but when deciding how to deploy their developers, new projects with new capabilities took precedence over cost-reducing older designs.
The dynamic was critical enough that all successful FPGA (and prior PLD) offerings provided some kind of intermediate cost-reduction option that fell short of a complete redesign but did provide some price relief for a nominal additional investment if the need arose. That capability was often what made a sale possible, and yet it was not exercised very often.
The one market where FPGAs had a harder time is the consumer market, which has very stringent cost requirements. It also has the highest volumes, where dedicated chips can be justified. That has made it harder for FPGAs to enjoy those high volumes.
Enter the increasingly electrified automotive market. For a long time this was not a great opportunity for electronics, in general, and FPGAs in particular. The majority of the vehicles were mechanically operated, with slowly increasing amounts of logic in electronic control units (ECUs) sprinkled around the vehicle.
The auto industry’s most visible sector is the consumer vehicle market, where cost expectations can be brutal, and yet device requirements are particularly rigid, given the harsh environment these devices have to work in. It’s been described as having requirements similar to the military, but with consumer pricing. That’s not an attractive place for higher-cost devices like an FPGA.
But that was all before the current wave of change swept over the automotive industry. At the very least, enormous chunks of the inner workings of vehicles are being converted from mechanical to electrical and electronic technologies. Completely new capabilities like advanced driver-assist systems (ADAS) are a major area of focus. Amenities like entertainment are going far beyond the old radio, where occupants would argue over which station to listen to. And autonomy is a complete game-changer.
All in all, vehicles are being completely rethought. In the short term we’re seeing variations on familiar themes and evolutionary developments, but it’s entirely possible that the cars we’ll drive — or that will drive us — tomorrow will be very different from what we have today.
It is this environment of dramatic change that has opened the door for FPGAs in vehicles. It’s a familiar place for them — as is the expectation that the FPGA party could come to an end as everything settles out. But there are reasons why FPGAs might prove stickier in this application than in many others, and which might cause some resistance to the impulse to cost-reduce the FPGAs out — at least for a long time to come.
It’s anyone’s game at the moment
FPGAs in vehicles appear to be particularly strong in the embedded vision chain, including sensors and displays, as well as networking, artificial intelligence (AI), and security. Many of the new developments in these areas have no standards yet. So even if volumes do ramp up, those volumes may be the sum of very different implementations — none of which would individually justify any cost reduction. They’re changing so rapidly that any ASIC would be out of date when it finally got to market.
And the timeframe for resolving how vehicles will be built may be measured in decades. It’s not just a sub-system here or there that’s being rethought. It’s the entire vehicle. While high-level requirements, such as a backup camera, may be shared by cars from different manufacturers, each OEM and Tier-1 supplier is likely to have a different approach to the solution.
Add to that the fact that cars have long design cycles, and that means that the feedback loop for figuring out what works well and what needs changing is longer. Decisions today will affect cars four to seven years from now. Consumer reaction can’t be registered until those consumers are able to experience how those vehicles work. That makes it very difficult to assess what specific features will be needed years out, and so implementations must be kept flexible so that the inevitable changes can be accommodated. FPGAs provide just such flexibility.
AI is under particularly heavy development. “The AI revolution is still in its very early stages,” said Willard Tu, senior director for automotive at Xilinx. “It’s going to take 10 years before silicon vendors can say, ‘Okay, I know exactly what to make you.’” The fact that today FPGAs are the only practical way to create integer AI implementations of less than 8 bits also makes them attractive.
Some aspects of vehicles are earning SoC investments, particularly infotainment. It’s likely that implementations may have more in common there across vehicles than other features, and they’re in less fundamental flux. But those SoCs might not be leveraged for other parts of the car with similar characteristics. For example, driver-monitoring systems (DMS) use, transport, and manipulate video. But infotainment SoCs are likely to be overkill for that application. DMS, by itself, is not necessarily going to be an attractive market for its own SoC, and so it’s likely to be another FPGA socket.
Industrial and agricultural vehicles are particularly good FPGA opportunities, because they have high levels of automation that need sophisticated logic, and very long lifetimes. “FPGAs are very heavily used in off-road vehicles like tractors, which have been autonomous vehicles for many, many years,” said Mallett. “They’re self-guided, and they’re GPS-controlled.”
But these vehicles don’t have the numbers that road cars have, making it likely that FPGAs will remain in place. “When you look at these two segments, it may be that they aren’t ever going to be high enough volume,” he added.
Dealing with cost, performance, and power
Cars are still cost-sensitive, but many of the features getting so much attention — ADAS in particular — are likely to be found mostly on high-end vehicles for a while. By definition, those customers are willing to pay more, and that creates less cost pressure on the components than would be the case for low-end vehicles.
How those vehicles are used also is changing. Autonomy already is partially in place for cars like so-called “robotaxis.” Because those are explicitly commercial vehicles that will earn revenues over their lifetimes, there is a more favorable return on investment that can support higher pricing.
“Robotaxis get to level four or level five (of automation), and everybody has a different configuration,” said Tu. “So in those areas today, maybe we could get displaced, but it could be far down the road when that would happen.”
FPGAs can also lower costs elsewhere. “The same hardware can implement different features or tiers that allow Tier 1s or OEMs to sell to different-sized cars (low-end, mid-range, or luxury),” said Jatinder P. Singh, marketing manager for automotive at Lattice Semiconductor. That creates a simpler overall fleet platform.
Device speed, which historically has been an FPGA tradeoff, appears not to be as much of an issue with vehicles. The performance requirements aren’t particularly onerous, and FPGAs are built on leading-edge technologies, putting them ahead of designs done on older process nodes.
Power is definitely a concern, especially for fully electric vehicles, where battery life means driving range. If implementations aren’t energy-conscious, the resulting car could have an uncompetitive range when it hits the market.
Converting to an ASIC historically has been a way to reduce power, as well. And, if an ASIC were built using the same process node as the FPGA, that might still be true. But realistically, advanced FPGAs are built on leading-edge nodes, while ASICs often use lagging nodes. “A lot of the ASICs coming out are still 28nm, because it’s a really nice cost-effective node,” said Tu.
Leading-edge nodes may have higher static current leakage, but their lower dynamic power more than makes up for it. “Newer geometries would perform a little bit better on power,” noted Tu. “The device will leak a little bit more, because the geometries are so small, but that’s offset by run performance.”
So comparing a 7nm FPGA to a 28nm ASIC may find them reasonably equivalent, possibly giving the FPGA an edge. “With shrinking technology nodes, power-optimized FPGA architectures are competing head-to-head with ASICs,” noted Singh.
SerDes use in larger FPGAs also can have an impact. “The SerDes takes up a big chunk of power on the FPGA,” cautioned Mallett. The SerDes power tracks with the available speed, with higher speed translating into higher SerDes power. But that speed tracks with the process node, and, because later nodes have lower net power, this becomes less of an issue, according to Xilinx.
A middle ground
Still, not everything is a matter of choosing between FPGAs and ASICs. While those two worlds exist, some in-between options are involving everything from advanced packaging to embedded FPGAs.
“As the investment goes up, due to the increased cost of masks and the IP and the design, you need to sell more of them,” said Geoff Tate, CEO of Flex Logix. “So chips have to be more like Swiss Army knives these days than a single-function, single-purpose chip. Adding reconfigurability into an embedded FPGA allows them to do that.”
This requires a melding of expertise, though, and design teams that understand both worlds have an advantage. “There’s still a learning curve for the customers who’ve never used FPGAs before,” Tate said. “The situations that come to speed the quickest are where they’ve got a big FPGA sitting beside an SoC, and they’re trying to cut power and cost. Integrating the FPGA into an SoC is a lot easier because they already know how to program the FPGA.”
Looked at from a different angle, more programmability is added into processors today to allow them to be leveraged for automotive applications, as well.
“Whether you’re going into the cloud market or 5G radio or automotive with ADAS, what is it that you customize in order to build the best possible solution?” asked Peter Greenhalgh, vice president of technology and fellow at Arm. “That layer of abstraction is still at the chip level, so you don’t have to go deep inside the CPU or GPU. Those components can still remain fairly generic. That’s not to say it’s simple, because it’s not. But fundamentally, the CPU or GPU or machine learning processor doesn’t change massively. You add in functional safety on top if it’s for automotive, or larger physical addressing if it goes into infrastructure markets. And obviously, there are some parts inside the microarchitecture that have to cope with larger workloads or smaller workloads. But fundamentally, the microarchitecture of these blocks doesn’t suddenly change.”
So given the almost continuous change, some sort of programmability is essential. How much programmability is needed may vary significantly by function in a vehicle, and whether the technology is brand new, such as 5G communication with infrastructure and other vehicles, or whether it is more evolutionary, such as smart seat belt tension adjustment or automatic braking modules.
Safety first
An additional consideration distinguishes the automotive market from the prior markets that have made FPGAs so successful — safety. That has historically been a consideration for military and aerospace systems, and those have played by very different rules.
Cars have safety needs that haven’t been required in other consumer markets. That creates a whole new checkbox that must be ticked before a vehicle can hit the road. It can take a lot of effort and money to get a vehicle — and all of its sub-systems and components — to pass ISO 26262 muster. It’s an investment that must have time to pay itself off for the economics to work.
According to Xilinx, new vehicles can cost on the order of $200 million to certify. “They have to build a small fleet and deploy to make sure it performs,” explained Tu. “That takes a fair amount of time and resources.” Any change to the hardware after certification will force the OEM to redo all of that work.
That means, for a given vehicle model, replacing an FPGA in a safety-critical module with an ASIC or an SoC would require a redo of all of those road tests. And that would likely lower the return on the cost-reducing investment to the point where it no longer makes sense.
“Even though they know they could save on the silicon, they’d have to go back and revalidate, and that revalidation is millions of dollars,” noted Tu. “I’ve had customers tell me point blank they’re going to stick with FPGAs just because of the high re-certification price tag. It’s not worth the redesign effort unless they’re going to make significant changes and improvements.”
Fig. 1: The effect of safety certification on updates. The top shows a simplified non-safety flow; the bottom shows the same flow for a safety-critical application. Certification can be very expensive. Source: Bryon Moyer/Semiconductor Engineering
The trigger for such a recertification is a hardware change, not a software change. “Everybody’s still fixated on hardware,” observed Tu.
But FPGAs are different from other hardware devices in that their content can be changed. Just as with software, this could be done using an in-field, over-the-air (OTA) update. FPGAs are updated under the control of software, although such an update changes the hardware. And that appears to fall into a gray area.
“If you can do an OTA update and you can update at any point, then it does make sense to include not only software, but hardware — because it’s ultimately all firmware,” noted Mallett.
So far, FPGA updates have been treated as fair game, like software updates. Unlike software updates, however, having a rollback option isn’t just a good idea, as it is for software. It’s required. “If you do mess up a hardware update, then you have to make sure that the base hardware has a way to reverse that back out,” cautioned Mallett. “No amount of software can operate on non-functional hardware.”
FPGAs have a vehicular home for the foreseeable future
It would be folly to declare that FPGAs will be immune from cost reduction in automobiles. But the level of uncertainty at the moment is enormous. No one knows what’s going to change or when it will change, and so everyone has to remain on their toes, ready to move with evolution in the market as it occurs.
“Tier-1s or OEMs are often compromising between the inflexibility of ASICs, the low performance of MCUs, or the high-power of GPUs and application processors,” observed Singh. That means that, for the foreseeable future, FPGAs are likely to find a welcome home in vehicles, despite the cost and challenges and any lingering power concerns.
— Ed Sperling contributed to this report.
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