Knowledge Center
Knowledge Center

Advanced Packaging

A collection of approaches for combining chips into packages, resulting in lower power and lower cost.


Advanced packaging is a general grouping of a variety of distinct techniques, including 2.5D, 3D-IC, fan-out wafer-level packaging and system-in-package.

While putting multiple chips in a package has been around for decades, the driver for advanced packaging is directly correlated with Moore’s Law. Wires are shrinking along with transistors, and the amount of distance that a signal needs to travel from one end of a chip over skinny wires is increasing at each node. By connecting these chips together using fatter pipes, which can be in the form of through-silicon vias, interposers, bridges or simple wires, the speed of those signals can be increased and the amount of energy required to drive those signals can be reduced. Moreover, depending on the package, there are fewer physical effects to contend with and components developed at different process nodes can be mixed.

These approaches are now in use across a wide range of products, but initial concerns about cost and time to market continue to slow adoption. That is changing. EDA companies have introduced new tools and flows to automate advanced packaging, and both foundries and OSATs are refining the processes to make it more predictable and less expensive. That is getting a boost by the rising cost of scaling transistors beyond 28nm, as well.