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Logic Restructuring

Restructuring of logic for power reduction
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Description

Move high switching operations up in the logic cone, and low switching operations back in the logic cone; a gate-level dynamic power optimization technique.
In design with low-power intent, synthesis tools automatically perform a variety of power optimization techniques including logic restructuring.

A gate-level dynamic power optimization technique, logic restructuring can, for example, reduce three stages to two stages through logic equivalence transformation, so the circuit has less switching and fewer transitions.

On a sample of designs, logic restructuring reduced dynamic power by less than 5%. It had no significant impact on any other aspects of the design flow.

Page contents originally provided by Cadence Design Systems