Knowledge Center
Knowledge Center

Heterogeneous Integration



The process of integrating different chips, chiplets, and chip components into a single package. In contrast to a monolithic chip, such as a system on chip (SoC), where all the functional blocks are built on one die in the same process node, heterogeneous integration integrates different chips — possibly from differing process nodes and functions — together on a substrate or stacked (or both) using various interconnect schemes.

The term is a superset for different types of advanced packaging that includes multi-chip modules (MCMs), SiPs, 2.5D, fan-outs, 3D-ICs, among other designs.

Companies have been doing types of heterogeneous integration on multi-chip modules and systems-in-packages for years before the term came into use. When chip designers started disaggregating their chips (breaking the monolithic chips into functions on separate chiplets), the term came into use in packaging houses.

Heterogeneous integration opens the door to an almost unlimited number of features in a single package, but it also adds system-level challenges into a small space filled with a whole spectrum of possible interactions. Issues can range from uneven aging, warpage, and different mechanical stresses, as well as some possible benefits.


Challenges Of Heterogeneous Integration