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Bunch of Wires (BoW)

Chiplet interconnect specification.


Bunch of Wires (BoW) is a chiplet interconnect specification developed by the Open Compute Project Foundation Open Domain-Specific Architecture (ODSA) project. It defines a versatile, open, and interoperable physical interface between two chiplets or chip-scale-packages (CSP) in a common package.

The ODSA die-to-die (D2D) communication architecture consists of:

  • A protocol layer that defines communication between SoC IPs using industry-standard or proprietary protocols
  • A transaction layer that translates between protocol transfers or protocol packets defined by a bus protocol and individual transaction streams and that manages the flow control of those individual streams
  • A link layer that converts between the individual transaction streams and a single bitstream transmitted between chiplets
  • A physical layer that performs the physical transmission of the single bitstream

The BoW physical layer (PHY) specification is optimized for both commodity (organic laminate) and advanced packaging technologies and is portable across multiple bump pitches and a range of process nodes. It aims to offer implementers the flexibility to trade off throughput/chipedge for design complexity, cost, and packaging technology.

Compared to SerDes, BoW uses a lower data rate/wire so it requires more wires. However, the lower data rates allow use of single-ended signaling and denser wire packing. In addition, in laminates, BoW can take advantage of multiple wiring layers and in advanced packaging it can take advantage of the much-increased wire density.

The BoW PHY is defined as a single unidirectional slice. Multiple slices are combined to create links of the desired throughput. A link may be symmetric, asymmetric or unidirectional. The BoW PHYs between two die are physically connected through wires on a substrate or interposer. A BoW PHY does not have enough drive strength for off-package interfaces, nor is it designed for buses that are entirely on die.

Within the package, the BoW datapath is transported on physical passive wires between the pair of connected die. The specifics of the wires, such as their density, maximum length, impedance characteristics, and how they are realized vary with the packaging technology.

The companion transaction and link layer specification defines profiles that allow customization of the mapping from transport layer services to underlying PHY via link layer services, allowing choice of PHY without affecting other layers.

It is focused on the silicon die disaggregation use case and aims to maintain simplicity to serve as many markets as possible. Key features include: (1) extensibility defining interface profiles allowing the addition of new link layer features, customization to bus protocols and enabling chiplet interconnect interoperability, (2) portability across different die implementation methodologies and process nodes, (3) ability to scale with support for multiple PHY slices and different data rates, (4) while keeping latency low, especially with use of Forward Error Correction (FEC) eliminating where possible serialization due to Cyclic Redundancy Check (CRC).

The latest versions of the specifications are available from the Open Compute Project Foundation website.



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