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AVM

Verification methodology created by Mentor
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The Advanced Verification Methodology (AVM) was a verification methodology and base class library written in SystemVerilog and created by Mentor Graphics in 2006. It provided a framework for component hierarchy and TLM communication to provide a standardized use model for SystemVerilog verification environments.

AVM was open-source and provided both SystemVerilog and SystemC methodologies. The SystemC version was based on the OSCI TLM standard.


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