Knowledge Center
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Chip Thermal Interface Protocol

Exchange of thermal design information for 3D ICs


May 2014 – Si2 announces new thermal interface protocol standard for 3D Integrated Circuits.
The Chip Thermal Interface Protocol (CTIP) facilitates the exchange of thermal design information required to integrate silicon die into 3D-IC stacks, enabling the stack designer to simulate the thermal behavior of the entire stack, thus ensuring that it satisfies die and stack-level requirements. The standard does not assume that the individual die and the complete 3D-IC stack are designed by the same team or same design system, allowing maximum flexibility of die stack and package integration. The CTIP standard will facilitate integration into multi-vendor EDA tool flows used in the design of either the 2D die or the 3D-IC stacks.

Simulating thermal behavior is critical for 3D-IC designs, as areas of high thermal load must be equally distributed throughout the entire stack of die to ensure proper operation in all expected conditions. The CTIP standard provides designers with the ability to share thermal maps and other design information, helping prevent the buildup of thermal stress points. In the case of heterogeneous 2.5D and 3D design stacks, where chips may be sourced by multiple IP vendors and foundries, the need for communication of thermal information between vendors and customers is even more critical in order to have a viable system design.