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IEEE 1801-Design/Verification of Low-Power, Energy-Aware UPF

IEEE Standard for Design and Verification of Low-Power Integrated Circuits also known by its Accellera name of Unified Power Format (UPF)
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Description

The Unified Power Format was developed within Accellera and the first version published in 2007. It specifies the power intent of an electronic design and includes elements such as power supply definitions, power control requirements, level shifters, isolation and memory retention. It does not specify how these things are accomplished, only what needs to be accomplished.
The standard was turned over to the IEEE for continued ratification in 2007 and P1801 was formed under the control of the Design Automation Standards Committee (DASC). The first IEEE version was released in 2009.

Two later versions have been released in (Accellera UPF 2.1) 2013 and 1801a in 2014. This standard is available for free under the IEEE Get Program – http://standards.ieee.org/getieee/1801/download/1801-2013.pdf

Books
An ASIC Low Power Primer: Analysis, Techniques and Specification

Low Power Methodology Manual: For System-on-Chip Design (Integrated Circuits and Systems)