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Vera

Hardware Verification Language
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Description

Vera was the first hardware verification language (HVL), developed within Sun Microsystems. It is a language that enables testbenches to be described using higher level of subtraction than Verilog, the language used to define the design. It was an object-oriented language that was similar to C++ and Java. It also introduce the notion of random variability so that multiple testcases could be generated from a single testbench.
Sun transferred the technology to Systems Science for its commercialization and the first version was released in 1995. They were acquired by Synopsys in 1998 for $26M in cash plus notes and assumed options for all outstanding shares and options of System Science.

In 2001, Synopsys opened up the language creating OpenVera. This enabled other companies to license the language and download the LRM for free, even though control of the language stayed with Synopsys.

OpenVera was one of the technologies from which the Accellera SystemVerilog language was created and it in turn became IEEE 1800