Week In Review: Design, Low Power

M&A
AMD will acquire Xilinx for $35 billion in an all-stock deal. “Joining together with AMD will help accelerate growth in our data center business and enable us to pursue a broader customer base across more markets,” said Victor Peng, Xilinx president and CEO. The deal is expected to close by the end of 2021. The acquisition of the programmable logic giant will leave only a few pureplay FPGA vendors in the market, after Intel’s acquisition of Altera and Microchip’s acquisition of Microsemi. But keeping up with Intel isn’t all there is to the deal, as SE Editor in Chief Ed Sperling observes in the analysis AMD Wants An FPGA Company, Too.

Marvell Technology will acquire Inphi Corporation, a maker of electro-optical networking, analog, and DSP chips. The deal is worth about $10 billion, which will include cash and stock. It is expected to close in the second half of 2021. As part of the transaction, Marvell intends to reorganize so that the combined company will be based in the United States. Matt Murphy, president and CEO of Marvell, explained the impact of the acquisition: “Inphi’s technologies are at the heart of cloud data center networks and they continue to extend their leadership with innovative new products, including 400G data center interconnect optical modules, which leverage their unique silicon photonics and DSP technologies. We believe that Inphi’s growing presence with cloud customers will also lead to additional opportunities for Marvell’s DPU and ASIC products.” Founded in 2000, Inphi is based in Santa Clara, Calif.

Ansys will acquire Analytical Graphics, Inc. (AGI), a provider of mission-driven simulation, modeling, testing and analysis software for aerospace, defense and intelligence applications, in a $700 million dollar cash and stock deal. The acquisition will expand Ansys’ simulation offerings beyond the component or product level to mission-level, such as tracking orbital satellites. “It will also expand the use of simulation in the key aerospace sector, where the stakes can be at their highest levels,” said Ajei Gopal, president and CEO of Ansys. “We are excited to welcome the expert AGI team – and to expand the reach of their world-class technology to industries outside of aerospace, including for autonomy and 5G applications.” AGI was founded in 1989 and is based in Exton, Penn. The deal is expected to close in the fourth quarter of 2020.

If these and the other major high-dollar acquisitions proposed earlier this year go through, 2020 could end up as the highest-value semiconductor M&A year yet.

Tools & IP
Flex Logix launched PCIe boards powered by the recently announced Flex Logix InferX X1 AI edge inference accelerator chip. The InferX X1P1 uses a single InferX X1 chip and a single LPDDR4x DRAM on a half-height, half-length PCIe board, with samples available for lead customers and production in Q2 2021. The InferX X1P4 will have four InferX X1 chips on the same size board: half-height, half-length and will sample mid-2021 with production by end of 2021. Finally, an InferX M.2 board will be available in the same time frame as X1P4. Software tools to accompany the boards will include Compiler Flow from TensorFlowLite/ONNX models, and an nnMAX Runtime Application.

Synopsys released a Virtualizer Development Kit (VDK) supporting the Infineon AURIX TC4xx Microcontroller Family. The TC4xx virtual prototype supports a comprehensive set of models for the Tricore CPU subsystem, the Parallel Processing Unit (PPU), memories, communication, timer, analog to digital converters, security and safety. Jointly developed by the two companies, the VDK has also been deployed internally at Infineon.

QuickLogic uncorked its ArcticPro 3 eFPGA IP for Samsung’s 28nm FD-SOI process. The ArcticPro 3 IP has a homogenous, reprogrammable fabric architecture based on Super Logic Cells, which consist of eight LUT4 + Register blocks, and it uses a hierarchical routing scheme to balance performance and power consumption for computation heavy, battery powered, or other power sensitive products.

Analog Bits revealed a portfolio of clocking, sensor, I/O and SERDES analog IP on multiple Samsung Foundry technologies, including 32LP, 28LPP, 28FDSOI, 14LPP, 8LPP, 7LPP, and 5LPE.

T2M IP released SDR RF IP for TSMC 40ULP with a contiguous frequency range from 100MHz-2.6GHz for ultra-low power IoT applications. The IP can receive multiple wireless standards including 5G, Wi-Fi, LTE, NB-IoT, Cat-M, 802.15.4g, 802.11ah, Bluetooth, LORA, and GNSS.

OnScale debuted a web-based cloud engineering multiphysics simulation platform, OnScale Solve. Using AWS and Google Cloud, it provides mechanical, thermal, and coupled thermal-mechanical analysis without installation through a browser.

Security & safety
Arm announced new developments in the Morello technology research program aimed at improving computing infrastructure security. The program is publicly releasing prototype architecture specifications that enable scalable compartmentalization for robustness and security, a platform model, an Open Source Software project and tool chains, and enhanced technical support. Funded by the UK government’s Industrial Strategy Challenge Fund (ISCF) Digital Security by Design (DSbD) program, other partners in the project include Google, Microsoft, the University of Cambridge, and the University of Edinburgh. The Morello board is targeted for launch in Q1 2022.

Rambus debuted its Internet Protocol Security (IPsec) Packet Engine with integrated Data Plane Development Kit (DPDK) and companion key negotiation toolkit for securing 5G network traffic at data rates from 1 to 10 Gbps. It targets SoCs for a range of 5G devices from base stations and cloud, to gateways and end devices. It supports the 3GPP, PDCP, TLS, SSL, and DTLS protocols, as well as all relevant IPsec RFCs and NIST-compliant algorithms.

IAR Systems announced a functional safety edition of IAR Embedded Workbench for RISC-V. The version will be certified by TÜV SÜD for IEC 61508 and ISO 26262 functional safety standards, as well as medical standard IEC 62304 and railway standards EN 50128 and EN 50657.

Markets
Imaging processing chips are in high demand in China after HiSilicon stopped production of them, reports DigiTimes. IC designers have been unable to fulfill orders until next year due to tight foundry capacity.

NOR flash memory supply constraints will grow tighter next year if the U.S.-China trade dispute continues, expects Macronix chairman Miin Wu. Taipei Times reports that Macronix has seen a boost from the trade dispute, but the US export restrictions on Huawei, its third-largest customer, could pose challenges.

Huawei has received some good news, however: Sony and OmniVision Technologies were granted U.S. licenses to sell certain image sensors to the company, according to Nikkei Asia. Sony’s CMOS image sensors were key to Huawei’s smartphone cameras.

The typical third and fourth quarter bump in DRAM prices is unlikely to happen this year, predicts market research firm IC Insights. After an increase in the early months of the COVID-19 pandemic, where DRAM ASP climbed to $3.70 in June 2020 driven by work-from-home and increased data center demands, prices have stabilized and are not expected to be majorly impacted by seasonal smartphone releases as consumers treat discretionary spending more cautiously.

Foundry certifications
Cadence’s custom and analog/mixed-signal (AMS) IC design flow was certified for Samsung Foundry’s 3nm gate-all-around (GAA) process technology for early design starts. The automated circuit design, layout, signoff and verification flow targets designs for automotive, mobile, data center, AI, and other emerging applications at 3nm.

Mentor’s digitally integrated High Density Advanced Packaging (HDAP) flow was certified for Samsung Foundry’s MDI (Multi-Die-Integration) packaging process. The reference flow includes prototyping, implementation, verification, and analysis and enables construction of a digital twin of the complete MDI package assembly.

Synopsys’ 3nm GAA AMS Design Reference Flow for designing analog and mixed-signal circuits using the Synopsys Custom Design Platform was certified by Samsung Foundry. Aimed at early design starts and optimized for advanced 5G, HPC, AI and IoT applications, it includes documented flows for design, layout, reliability analysis and signoff. In addition, Samsung certified a new digital implementation, timing, and physical signoff reference flow for accelerating HPC designs using Synopsys’ Fusion Design Platform. The two companies also jointly developed more than 30 new interoperable process design kits (iPDKs) for a range of Samsung’s advanced and legacy process nodes, including 3nm to 14nm GAA and finFET nodes and some  legacy nodes from 65nm to 130nm.

Ansys’ semiconductor design suite was certified for all Samsung Foundry finFET process nodes, including 14nm, 11nm, 10nm, 8nm, 7nm, 5nm, and 4nm. The certification includes power integrity EM and IR-drop, statistical EM budgeting, thermal analysis, and multiphysics solutions for multi-die integration. Additionally, Samsung has used Ansys’ RedHawk-SC to optimize performance, power and reliability for advanced process node designs.

Deals
Ansys Cloud simulation tools have been integrated with Microsoft Azure cloud, HPC, digital twin, and IoT services. Ansys says the platform will let customers use existing software licenses and reduce modeling run times by increasing cores per job and provide price-performance improvements.

Honeywell inked a deal to use Ansys simulation tools as a common platform across the company. Honeywell aims to drive process improvement and digitization across the company and cut development cycle times.

Events
Find a new conference or learning opportunity at our events page, or check out an upcoming webinar.

Coming up soon is the Future of AI Hardware event on Nov. 2-5; the WE20: Conference For Women Engineers on Nov. 2-30; the SC20: International Conference For HPC, Networking, Storage & Analysis on Nov. 9-19; and the Flash Memory Summit on Nov. 10-12.