Why RISC-V Is Succeeding

There is no disputing the excitement surround the introduction of the RISC-V processor architecture. Yet while many have called it a harbinger of a much broader open-source hardware movement, the reasons behind its success are not obvious, and the implications for an expansion of more open-source cores is far from certain.

“The adoption of RISC-V as the preferred architecture for many silicon developers has initiated a tidal wave of innovation in the hardware development community,” says Stephano Cetola, director of technical programs at RISC-V International. “Designers are now taking their RISC-V-based designs and moving toward actual implementations within a variety of industries.”

This is hardly the first time that a processor implementation, or instruction set architecture (ISA), has been put in the public domain. The industry is littered with them, including OpenPOWER, OpenSPARC, OpenRISC, and many more. While each has gained a certain level of traction, they all pale in comparison to the success of RISC-V in a very short timeframe.

When talking to people in the RISC-V community, there are two words that are repeated often — free and freedom. Some people want cores that are free, while others want the freedom to do with the cores whatever they want. To those people, free is almost immaterial because they will spend a lot to get what they want.

A changing marketplace
The rise of RISC-V coincides with a couple of other events in the industry. The first is the slowing of Moore’s Law, meaning that increases in total processing power no longer comes along with each new fabrication node. The second is the meteoric rise in machine learning, demanding massive increases in processing power. So is it just a matter of right place, right time?

The perception around processors has changed. “RISC-V has been fueled by the requirements for freedom in the hardware design process community,” says Simon Davidmann, founder and CEO for Imperas Software. “Electronic products are defined by their functionality, a lot of which is defined by software, which is running on processors. Everything needs some form of machine learning today. It doesn’t matter if we are talking about your phone, taking better pictures, whatever it is, there are huge amounts of computing needed. And what people realized is that they needed lots of processors. They needed their own fabrics of processors. You need to configure them the way you want. Off-the-shelf technologies don’t help you. So there’s a change in the electronic product marketplace saying, ‘We need freedom to architect chips, and freedom to architect the processors and the fabrics of processors that live in these chips.'”

Others agree. “With semiconductor scaling failing, the only way to provide increase in computational performance is specialization,” said Roddy Urquhart, senior marketing director at Codasip. “The open RISC-V ISA is modular and supports custom instructions making it the ideal ISA to create a wide range of specialized processors and accelerators”

All of this needs to be viewed in the context of a new generation of systems companies entering the market, each with unique economic justifications. But one thing these systems companies do have in common is they are not trying to sell the chips they develop. Instead, they are selling services that in some way are fueled by those products. There are no suitable products they can buy from the available marketplace, and so they are ready to develop chips themselves, while also fueling some of the necessary innovations through contribution and collaboration. In this scenario, RISC-V plays an important role.

What makes RISC-V different
RISC-V is creating breakthroughs is multiple areas, and the reasons for success in each are different. To understand this, it’s necessary to separate out various aspects of RISC-V’s success. First is the architecture itself. Second are the plethora of open-source implementations of the architecture that are being made available. A third area is the support cores that are becoming available to surround the processor core. And finally, there are the tools necessary to help with the implementation and verification of a RISC-V processor.

It was originally created to serve a particular need. “It now has significant resources behind it,” says Imperas’ Davidmann. “Initially, it came out of universities, academics, smart people in universities, building a good thing. Coming out of Berkeley, in the middle of Silicon Valley, it gained some momentum from people and ex-Berkeley grads. Momentum built much more than OpenRISC. The universities needed it and they drove it.”

RISC-V is now an open standard ISA, driven out of UC Berkeley, with an industry nonprofit organization looking after it – RISC-V International. Many universities created open cores, like the Rocket cores from Berkeley, ETH Zurich with their pulp platform, and many others. Today, there are numerous industry collaboration groups, bringing together both industry and academia, building open-source cores, and making them available to the community at large. Examples include the CHIPS Alliance and OpenHW Group.

Lots of countries have created initiatives that are satisfying local needs. India has its Shakti program, driven out of IIT Madras. In Israel, the GenPro consortium is bringing industry and academia together. Other similar programs exist in Japan and China, where they are building RISC-V cores as open source in order to make them available to their communities and for their specific interests.

RISC-V is the first open and customizable ISA. “Currently, the main industrial interest associated with RISC-V isn’t about an open-source implementation but on the open-source instruction set,” says Andy Heinig, group leader for advanced system integration and department head for efficient electronics at Fraunhofer IIS’ Engineering of Adaptive Systems Division. “With this the environment is standardized, but the practical implementation is company-specific and company-owned. We see similar activity in the field of chip-to-chip interfaces, where different standards are under preparation and discussion. Here, too, the standards allow for interoperability between chips from different vendors. RISC-V allows for interoperability on the software side.”

The ability to make modifications is important. “The emergence of open-source ISA’s, like RISC-V, with support for custom extensions gives an incredible amount of freedom to processor designers,” says Shubhodeep Roy Choudhury, CEO and co-founder of Valtrix Systems. “At the same time, it poses a very interesting verification challenge. Making sure all the designs are compliant and functionally correct calls for a shift in the way the test generators are designed. They need to be highly configurable to allow verification of custom features along with legacy/baseline features.”

It is a big jump from an open ISA to open-source processors. “The concept of open-source IP is very tantalizing because it conjures the concept of free IP,” says Andy Jaros, vice president of IP sales and marketing at Flex Logix. “However, open source is not free. Most companies, unless they want to invest huge resources to the IP development, license pre-implemented RISC-V cores from a myriad of IP providers such as Open5, Andes, and many others. This saves on development time, verification, software development, etc., and warranties and indemnification.”

Having multiple companies developing competing cores fosters innovation within the implementation. “The real value to RISC-V is that it provides competition to Arm, not because it’s open source,” adds Jaros. “There are multiple RISC-V core providers that give the market choices and foster competition. With Arm, you can only get Arm cores from Arm.”

Another driving factor is the rapidly increasing core count, and this makes paying royalties based on instances less desirable. “People wanted processors all over their designs,” says Davidmann. “They want lots of small processors, and existing licensing terms were quite difficult. It was expensive, sure, but more importantly, it was restricted in terms of the freedom to change it. I don’t believe the success of RISC-V is because it is cheap or lower cost. If you just want to do the same as you can get with an Arm core, you absolutely should just buy an Arm core because it’s so well verified. It’s so well designed. It’s exactly what you want. The only reason for using RISC-V is because you want the freedom to change it and add your own things to it.”

Even with all of this, RISC-V probably would have been successful without the development of an ecosystem surrounding it. “The open-source community developed key tools that are crucial to make RISC-V-based processors ubiquitous, such as chip technology process design kits, design verification suites, implementation tools, and more,” says RISC-V International’s Cetola. “This also has enabled the democratization of VLSI design with the development of higher-level design description languages, and sophisticated open-source automation tools to accelerate the development of design, taking the capabilities of RISC-V even farther. With the design tools and tool chains, RISC-V will soon become entirely ubiquitous.”

The OpenHW Group is one of the industry collaborations that is making this possible. It is developing both processor cores and the surrounding IP to support the core. In addition, it is putting in place a full suite of tools that have be used to design and verify those cores. “The way they do things is different, says Davidmann. ” One is they give you the source so you can change it. More importantly, they also give you a verification environment so that if you make a change, you know it still works. If someone were to just throw a core at you, and you changed some code, you’re at risk that you’ve broken something. You need a sophisticated verification environment to know that you haven’t broken it. And that’s where OpenHW differentiates itself in the open-source hardware space, because they provide the complete verification environments. If you add a new instruction, you know you haven’t broken the rest. I don’t think people will just take an OpenHW core and use it. That doesn’t make much sense. You could do that if you want to save money. But what it allows you to do is to take it and extend it, and it’s an extremely good base to start from. That’s the key. You you’re not starting from scratch.”

Expanding the scope
Can this open-source momentum expand beyond the processor core? The processor is a small piece of a complete SoC. It also needs memory controllers and memory interfaces, USB, PCI, and much more. Those cores provide no differentiation to a product, and many people would like those to be open source, as well.

The problem is that these cores are very complex, and they contain analog pieces, which tend to be custom designed and implemented for every foundry and process technology. While the controllers could be constructed in an open-source manner, arguments can be made that not having the digital and analog portions tightly integrated can lead to inferior products.

LowRISC is an organization that has been formed in the U.K. It initially wanted to build an open-source system that was the equivalent of the Raspberry Pi. Today, it develops both hardware and software in a fully collaborative framework. This includes RISC-V cores, and the software compile infrastructure to support it.

More recently, Google created a specification and IP for silicon root of trust. It open-sourced this work and has entrusted lowRISC with its stewardship. Part of the focus here was that being open and transparent ultimately improves security and trustworthiness, rather than the ability to modify the specification.

Conclusion
RISC-V has enabled and promoted innovation. While free may be important to a segment of the industry, the real key is freedom. That freedom has brought likeminded people, companies, and organizations together to break new ground. It is less likely to lead to a breadth expansion than a depth expansion. While additional hardware blocks may be open source, perhaps the most important gain will be the ability to quickly take an open specification for a processor and implement it.

Tools that targeted processor development and verification died out when engineers stopped developing their own custom processors, because during the 1980s they provided little to no differentiation. Now that processors have become highly differentiated again, the industry is collaborating to develop the necessary tools. An as-yet unanswered question is whether they will be able to create open-source tools faster than the EDA industry can provide them.

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