Collaboration across industry, academia, and research labs is driving the future of semiconductor design.
At this year’s DAC Chips to Systems Conference (DAC 2025), Keysight and its partners showcased how engineers are rethinking design workflows from chips to complete systems. The Partner Theater, hosted by Keysight brought together innovators from across the semiconductor ecosystem – each tackling one of today’s most pressing challenges: how to manage exploding volumes of design data and leverage AI-ready workflows to accelerate time-to-market.
From data management breakthroughs to RFIC automation and system-level simulation, these sessions highlight the diverse ways engineering teams are driving the next wave of electronic design.
The foundation of today’s AI-enabled design workflows is data. Keysight highlighted how its Design Data Management (SOS) data management platform is enabling teams to unify, track and optimize design data across complex workflows – whether in EDA, system simulation, or AI/ML-driven design.
Watch the session: Mastering Modern Data Management
With the rise of chiplet-based architectures driving performance, scalability, and cost gains, this talk explores building an interoperable chiplet ecosystem. We’ll highlight golden die validation with pre-silicon correlation and show how UCIe standards and Keysight solutions ensure compliance and cross-vendor interoperability.
Watch the session: Building an Interoperable-Chiplet-Ecosystem
Ansys demonstrated how physics simulation and system simulation can be united to validate hardware and software together, enabling seamless hardware-in-the-loop workflows for complex electronic systems.
Watch the session: Uniting Physics Simulation with System Simulation
See how Keysight and AWS are transforming semiconductor design workflows in the cloud. This session introduces a powerful framework for migrating design repositories to AWS with near zero downtime. By combining asynchronous replication, automation, and Keysight’s engineering expertise, the solution ensures data integrity, continuous availability, and seamless integration with AWS services. Attendees will learn how this approach streamlines infrastructure, boosts security, and delivers operational efficiency for next-generation design environments.
Watch the session: Method and Apparatus to Migrate Design Repositories into the Cloud
As AI and verification workloads explode, many teams discover the limiter isn’t CPU or GPU—it’s the data path. This session breaks down how to architect networked storage so compute never idles: balancing throughput and metadata latency for mixed EDA/AI I/O patterns, right-sizing parallelism, and aligning cache, tiering, and QoS with queue depth and job mix across the farm.
Watch the session: Optimizing Network Storage for AI EDA
Pushing silicon beyond conventional boundaries, researchers at Lawrence Berkeley Lab discussed custom ASIC development for high-energy physics applications. These designs push extreme performance and reliability requirements, underscoring the importance of advanced data and simulation tools.
Watch the session: Custom ASICs for High-Energy Physics
Discover how the rapid rise of AI is reshaping the future of electronics. This session explores the soaring demands on manufacturing, energy, and design, and how Intel is tackling these challenges with bold system-level strategies and ambitious sustainability goals. Learn how advances in chiplet architectures and packaging, combined with deep collaboration with partners like Keysight, are driving the next wave of AI hardware innovation.
Watch the session: Intel Foundry’s System of Chips Approach
RF system design is entering the AI era. Epirus shared how combining SOS-based data management with advanced circuit simulation enables more agile RF engineering workflows, paving the way for AI-ready system architectures.
Watch the session: Design Data Management (SOS) and Epirus RF Engineering
From academia, Rice University explored how EDA automation is reshaping RFIC design – moving away from manual iterations toward automated, AI-driven flows that accelerate innovation.
Watch the session: Moving Towards Design Automation of RFICs
FILPAL addressed the intersection of AI and EDA, highlighting how machine learning is reshaping verification, optimization and simulation for next-generation design workflows.
Watch the session: Unleashing the Power of AI to Transform EDA
Keysight returned to the stage to discuss how “shifting left” in the design cycle – bringing verification and analysis earlier into the workflow – enables faster product realization and reduces costly late-stage iterations.
Watch the session: Shifting Left in New Technology Platforms Utilizing Design Solutions
Finally, DuPont shared how variations in glass fiber and resin content impact signal integrity – an increasingly critical factor in the performance of high-speed systems. Their study underscores the need to integrate materials-level insights into the design workflow.
Watch the session: Effects of Glass Fiber and Resin on Signal Integrity using ADS
The Keysight Partner Theater at DAC showed how collaboration across industry, academia and research labs is driving the future of semiconductor design. Whether it’s mastering data, applying AI to EDA, or uniting physics and system simulation, these sessions demonstrate a clear trend: innovation in design workflows is as critical as innovation in the silicon itself.
Explore all the highlights and see how Keysight Design Engineering Software and its partners are enabling the chips-to-systems transformation.
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