Pathfinding Beyond FinFETs


Though the industry will likely continue to find ways to extend CMOS finFET technology further than we thought possible, at some point in the not-so-distant future, making faster, lower power ICs will require more disruptive changes. For something that could be only five to seven years out, there’s a daunting range of contending technologies. Improvements through the process will help, from E... » read more

Pain Points At 7nm


Early work has begun on 7nm. Process technology has progressed to the point where IP and tools are being qualified. There is still a long way to go. But as companies begin engaging with foundries on this process node—[getentity id="22586" comment="TSMC"] is talking publicly about it, but [getentity id="22846" e_name="Intel"], [getentity id="22819" comment="GlobalFoundries"] and [getentity ... » read more

What’s After 10nm?


Prior to 28nm the semiconductor road map was astoundingly predictable. Every two years you could be assured that features would shrink until there were no more atoms left. Two big things and lots of little things later, the trajectory looks much more uncertain. On the large things side are the obvious culprits—EUV delays, and RC delay caused by thinner wires. This is tough science. Pro... » read more

Ecosystem Changes


Semiconductor Engineering sat down to discuss changes in the semiconductor ecosystem with Kelvin Low, senior director of foundry marketing at [getentity id="22865" e_name="Samsung Semiconductor"]; John Costello, vice president of product planning at [getentity id="22849" e_name="Altera"]; Randy Smith, vice president of marketing at [getentity id="22605" e_name="Sonics"], and Michiel Ligthart, p... » read more

Issues And Options At 5nm


While the foundries are ramping up their processes for the 16nm/14nm node, vendors are also busy developing technologies for 10nm and beyond. In fact, chipmakers are finalizing their 10nm process offerings, but they are still weighing the technology options for 7nm. And if that isn’t enough, IC makers are beginning to look at the options at 5nm and beyond. Today, chipmakers can see a p... » read more

One-On-One: Mark Bohr


Semiconductor Engineering sat down to discuss process technology, transistor trends, chip-packaging and other topics with Mark Bohr, a senior fellow and director of process architecture and integration at Intel. SE: Intel recently introduced chips based on its new 14nm process. Can you briefly describe the 14nm process? Bohr: It’s our second-generation, tri-gate technology. So it has al... » read more

Will 7nm And 5nm Really Happen?


Today’s silicon-based finFETs could run out of steam at 10nm. If or when chipmakers move beyond 10nm, IC vendors will require a new transistor architecture. III-V finFETs, gate-all-around FETs, quantum well finFETs, SOI finFETs and vertical nanowires are just a few of the future transistor candidates at 7nm and 5nm. Technically, it’s possible to manufacture the transistor portions of the... » read more

Will 7nm And 5nm Really Happen?


As leading-edge chipmakers continue to ramp up their 28nm and 20nm devices, vendors are also updating their future technology roadmaps. In fact, IC makers are talking about their new shipment schedules for 10nm. And GlobalFoundries, Intel, Samsung and TSMC are narrowing down the options for 7nm, 5nm and beyond. There is a high probability that IC makers can scale to 10nm, but vendors face a ... » read more

Atomic Layer Etch Finally Emerges


The migration towards finFETs and other devices at the 20nm node and beyond will require a new array of chip-manufacturing technologies. Multiple patterning, hybrid metrology and newfangled interconnect schemes are just a few of the technologies required for future scaling. In addition, the industry also will require new techniques that can process structures at the atomic level. For example... » read more

The Search For The Next Transistor


In the near term, the leading-edge chip roadmap looks fairly clear. Chips based on today’s finFETs and planar fully depleted silicon-on-insulator (FDSOI) technologies are expected to scale down to the 10nm node. But then, the CMOS roadmap becomes foggy at 7nm and beyond. The industry has been exploring a number of next-generation transistor candidates, but suddenly, a few technologies are ... » read more