Chip Industry Week In Review

By The SE Staff - 29 Mar, 2024 - Comments: 0

By Adam Kovac, Karen Heyman, and Liz Allan. China introduced strict procurement guidelines aimed at blocking the use of AMD and Intel processors in government computers. Meanwhile, China urged the Netherlands to ease restrictions on deep ultraviolet (DUV) litho equipment, according to Nikkei Asia. DUV is an older technology, based on 193nm ArF lasers, but in conjunction with multi-p... » read more

Research Bits: October 3

By Jesse Allen - 03 Oct, 2023 - Comments: 0

Growing indium selenide at scale Researchers from the University of Pennsylvania, Brookhaven National Laboratory, and the Air Force Research Laboratory grew the 2D semiconductor indium selenide (InSe) on a full-size, industrial-scale wafer. It can also be deposited at temperatures low enough to integrate with a silicon chip. The team noted that producing large enough films of InSe has prove... » read more

Week In Review: Manufacturing, Test

By Gregory Haley - 01 Sep, 2023 - Comments: 0

Bosch completed its acquisition of TSI Semiconductors to expand its SiC chips business, reports Reuters. In April, Bosch announced plans to invest $1.5 billion in the Roseville, California, foundry to convert TSI’s manufacturing facilities into state-of-the-art processes, with the first SiC chips due out in 2026. Bosch CEO Stefan Hartung said the full expansion "depends on the support of the... » read more

Chip Industry’s Technical Paper Roundup: August 22

By Linda Christensen - 22 Aug, 2023 - Comments: 0

New technical papers added to Semiconductor Engineering’s library this week. [table id=129 /] More Reading Technical Paper Library home » read more

Week In Review: Semiconductor Manufacturing, Test

By Gregory Haley - 18 Aug, 2023 - Comments: 0

Intel dropped out of a $5.4 billion deal to purchase Tower Semiconductor in Israel. Intel cited the inability to obtain regulatory approval in a timely manner as the reason for ending the deal signed in February. Intel will pay a $353 million termination fee to Tower. The silicon wafer supply has moved back into positive territory for 2023 thanks to a 7% decline in wafer shipments combined w... » read more

High-Performance P-Type FET Arrays With Single-Crystal 2D Semiconductors And Fermi-Level-Tuned vdW Contact Electrodes

By Technical Paper Link - 15 Aug, 2023 - Comments: 0

A technical paper titled “Fabrication of p-type 2D single-crystalline transistor arrays with Fermi-level-tuned van der Waals semimetal electrodes” was published by researchers at Ulsan National Institute of Science and Technology (UNIST), University of Pennsylvania, Institute for Basic Science (IBS), Sogang University, and Changwon National University. Abstract: "High-performance p-type t... » read more

Chip Industry Technical Paper Roundup: August 15

By Liz Allan - 15 Aug, 2023 - Comments: 0

New technical papers added to Semiconductor Engineering’s library this week. [table id=128 /] More Reading Technical Paper Library home » read more

New & Faster Single-Crystalline Oxide Thin Films (Max Planck, Cambridge, U of Penn.)

By Technical Paper Link - 07 Aug, 2023 - Comments: 0

A technical paper titled “Li iontronics in single-crystalline T-Nb2O5 thin films with vertical ionic transport channels” was published by researchers at Max Planck Institute of Microstructure Physics, University of Cambridge, University of Pennsylvania, Gumi Electronics and Information Technology Research Institute, Northwestern University, and ALBA Synchrotron Light Source. Abstract: "Th... » read more

Research Bits: July 18

By Jesse Allen - 18 Jul, 2023 - Comments: 0

Miniaturized ferroelectric FETs Researchers from the University of Pennsylvania, Hanyang University, King Abdulaziz University, King Abdullah University of Science and Technology, and University of Tokyo proposed a new ferroelectric FET (FE-FET) design with improved performance for both computing and memory. The transistor layers the two-dimensional semiconductor molybdenum disulfide (MoS2)... » read more

Research Bits: Jan. 24

By Jesse Allen - 24 Jan, 2023 - Comments: 0

Transistor-free compute-in-memory Researchers from the University of Pennsylvania, Sandia National Laboratories, and Brookhaven National Laboratory propose a transistor-free compute-in-memory (CIM) architecture to overcome memory bottlenecks and reduce power consumption in AI workloads. "Even when used in a compute-in-memory architecture, transistors compromise the access time of data," sai... » read more

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