Challenges To Building Level 5 Automotive Chips
By Ann Mutschler - 05 Sep, 2019 - Comments: 0

It’s an exciting time in the automotive space, and this is especially true when it comes to all of the activity around autonomous driving and the path to achieving full Level 5 autonomy. The technology is complex, the ecosystem seems to get more complex by the day, and simulating autonomous systems safely makes this an extremely fascinating area from an engineering perspective. At the heart o... » read more

Re-Architecting SoCs For The AI Era
By Arteris - 04 Sep, 2019 - Comments: 0

The growth of artificial intelligence (AI) demands that semiconductor companies re-architect their system on chip (SoC) designs to provide more scalable levels of performance, flexibility, efficiency, and integration. From the edge to data centers, AI applications require a rethink of memory structures, the numbers and types of heterogeneous processors and hardware accelerators, and careful con... » read more

Creating A Unified Platform For Automotive Embedded Application Development
By Mentor, a Siemens Business - 04 Sep, 2019 - Comments: 0

Automotive embedded software complexity is ballooning as software applications play a critical role in delivering the features and functionality demanded in modern vehicles. Current software development methodologies are incapable of managing the numerous and intricate cyber-physical interfaces in the cars of today. To compete, companies must evolve their software development processes to estab... » read more

IP’s Growing Impact On Yield And Reliability
By Ann Mutschler - 04 Sep, 2019 - Comments: 0

Chipmakers are finding it increasingly difficult to achieve first-pass silicon with design IP sourced internally and from different IP providers, and especially with configurable IP. Utilizing poorly qualified IP and waiting for issues to appear during the design-to-verification phase just before tape-out can pose high risks for design houses and foundries alike in terms of cost and time to... » read more

A Complete System-Level Security Verification Methodology
By Cadence - 04 Sep, 2019 - Comments: 0

Hardware is at the root of all digital systems, and security must be considered during the system-on-chip (SoC) design and verification process. Verifying the security of an SoC design is challenging because of time to market pressure and resource constraints. Resources allocated to the already time-consuming task of functional verification must be diverted to security verification, which requi... » read more

Combating Counterfeit Semiconductors in the Automotive Supply Chain
By Rambus - 04 Sep, 2019 - Comments: 0

The counterfeit market for semiconductors is real, sizable and growing. Industry analysts peg the current market for fake semiconductors at $75B. Counterfeit chips pose great risk to driver comfort and safety, to say nothing of the severe negative consequences they present to automaker revenues and brand. The good news is there are immediate and cost-effective measures available to secu... » read more

New Technologies To Support 3D-ICs
By Brian Bailey - 04 Sep, 2019 - Comments: 0

Semiconductor Engineering sat down to discuss changes required throughout the ecosystem to support three-dimensional (3D) chip design with Norman Chang, chief technologist for the Semiconductor Business Unit of ANSYS; John Park, product management director for IC packaging and cross-platform solutions at Cadence; John Ferguson, director of marketing for DRC applications at Mentor, a Siemens Bus... » read more

Blog Review: Sept. 4
By Jesse Allen - 04 Sep, 2019 - Comments: 0

Synopsys' Taylor Armerding checks out Apple's newly expanded bug bounty program, with bounty payouts are increasing to compete with malicious actors, and why even with security-oriented development the practice of bug bounties will remain needed. Mentor's Colin Walls shares a few more embedded software tips, this time on external variables, delay loops in real time systems, and meaningful pa... » read more

Best Practices for Deploying ClioSoft SOS7 on AWS
By Cliosoft - 04 Sep, 2019 - Comments: 0

Semiconductor integrated circuits (ICs) are at the center of a number of modern technological innovations. To keep up with the ever-increasing pace of innovation, IC design teams require robust, scalable design management (DM) solutions to enable seamless global collaboration and to increase productivity. This paper outlines the advantages of and best practices for deploying the ClioSoft SOS de... » read more

Enabling Faster Design, Verification and Debug of FPGAs
By Synopsys - 04 Sep, 2019 - Comments: 0

Field programmable gate arrays (FPGAs) are no longer the co-processor of full-custom chips and application-specific integrated circuits (ASICs). Today’s FPGA offerings include devices as large and complex as any ASIC system-on-chip (SoC) on the market. The dramatic increase in size, complexity and functionality means that many FPGA development teams are adopting ASIC-style design, verificatio... » read more

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