Ferroelectrics: The Dream Of Negative Capacitance

By Katherine Derbyshire - 15 Dec, 2022 - Comments: 0

Ferroelectrics are getting a serious re-examination, as chipmakers look for new options to maintain drive current. Ferroelectric materials can provide non-volatile memory, serving an important functional gap somewhere between DRAM and flash memory. Indeed, ferroelectrics for memory and 2D channels for transistors were two highlights of the recent IEEE Electron Device Meeting. Ferroelectri... » read more

3D Sensing Package Solutions

By Chiung Lee - 15 Dec, 2022 - Comments: 0

By Chiung Lee, Weilung Lu, and Adrian Arcedera 3D sensing technology is rapidly being adopted in a variety of growing markets. End-product applications include smartphones, tablets, augmented/virtual reality products, robot vacuum cleaners, industry inspection machines, and automotive vehicles. As shown in figure 1, Yole Développement expects the 3D imaging and sensing market to expand from... » read more

The March Toward Chiplets

By Ed Sperling and Karen Heyman - 15 Dec, 2022 - Comments: 0

The days of monolithic chips developed at the most advanced process nodes are rapidly dwindling. Nearly everyone working at the leading edge of design is looking toward some type of advanced packaging using discrete heterogeneous components. The challenge now is how to shift the whole chip industry into this disaggregated model. It's going to take time, effort, as well as a substantial reali... » read more

Automotive MEMS Accelerometer Design Verification: A Real Life Example

By Arnaud Parent - 15 Dec, 2022 - Comments: 0

Standard Finite Element (FE) models, especially those that incorporate multiple physical domains, consist of detailed representations of a device that include a large number of Degrees of Freedom (DoF). The Degrees of Freedom in a design are the number of independent variables or parameters needed to describe the motion or state of the device. Generally, the larger the number of Degrees of Free... » read more

A New Dimension In Optical CD

By Ilya Osherov - 15 Dec, 2022 - Comments: 0

One of the biggest challenges for nanoscale fabrication is how to measure devices on such a minute scale. As the semiconductor industry demands ever smaller devices, the need for reliable, robust measurements for quality control and process optimization increases. One robust and commonly used technique in semiconductor manufacturing is optical critical dimension (OCD) metrology. Standard, al... » read more

Driving Toward Net-Zero: Key Takeaways From Semiconductor Sustainability Summit

By Ashley Huang - 15 Dec, 2022 - Comments: 0

To address the climate crisis, countries around the world are pursuing ambitious targets to achieve net-zero carbon emissions by 2050 under the Paris Agreement. In March, Taiwan redoubled its focus on decarbonization by announcing its net-zero pathway, while its Environmental Protection Administration (EPA) under the Executive Yuan is reshaping the Greenhouse Gas Reduction and Management Act in... » read more

All-Digital MDL-Based Fast Lock Clock Generator For Low-Power Chiplet-Based SoC Design

By Technical Paper Link - 14 Dec, 2022 - Comments: 0

A new technical paper titled "A Fast-Lock All-Digital Clock Generator for Energy Efficient Chiplet-Based Systems" was published by researchers at Hongik University, Seoul, South Korea. "An all-digital clock frequency multiplier that achieves excellent locking time for an energy-efficient chiplet-based system-on-chip (SoC) design is presented. The proposed architecture is based on an all-digi... » read more

Heterogeneous Integration Issues And Developments

By Ed Sperling - 14 Dec, 2022 - Comments: 0

There are a slew of new developments in advanced packaging, from new materials, chiplets, and interconnect schemes, to challenges involving how to physically put chips in a package, metallization, thermal cycling, and parasitics in the interconnect path. Dick Otte, CEO of Promex Industries, talks about how this will change chip design and manufacturing, and how those changes are likely to unfol... » read more

3D-IC Reliability Degrades With Increasing Temperature

By Ann Mutschler - 14 Dec, 2022 - Comments: 0

The reliability of 3D-IC designs is dependent upon the ability of engineering teams to control heat, which can significantly degrade performance and accelerate circuit aging. While heat has been problematic in semiconductor design since at least 28nm, it is much more challenging to deal with inside a 3D package, where electromigration can spread to multiple chips on multiple levels. “Be... » read more

Pathfinding By Process Window Modeling: Advanced DRAM Capacitor Patterning Process Window Evaluation Using Virtual Fabrication

By Coventor - 14 Dec, 2022 - Comments: 0

In advanced DRAM, capacitors with closely packed patterning are designed to increase cell density. Thus, advanced patterning schemes, such as multiple litho-etch, SADP and SAQP processes may be needed. In this paper, we systematically evaluate a DRAM capacitor hole formation process that includes SADP and SAQP patterning, using virtual fabrication and statistical analysis in SEMulator3D. The pu... » read more

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