Capability Hardware Enhanced RISC Instructions (CHERI) For Verification, With Better Memory Safety (Oxford)
By Technical Paper Link - 30 Nov, 2022 - Comments: 0

A technical paper titled "A Formal CHERI-C Semantics for Verification" was published by researchers at University of Oxford. Abstract: "CHERI-C extends the C programming language by adding hardware capabilities, ensuring a certain degree of memory safety while remaining efficient. Capabilities can also be employed for higher-level security measures, such as software compartmentalization, ... » read more

Making Chips Yield Faster At Leading-Edge Nodes
By Ed Sperling - 30 Nov, 2022 - Comments: 0

Simulation for semiconductor manufacturing is heating up, particularly at the most advanced nodes where data needs to be analyzed in the context of factors such as variation and defectivity rates. Semiconductor Engineering sat down with David Fried, corporate vice president of computational products at Lam Research, to talk about what's behind Lam's recent acquisition of Esgee Technologies, ... » read more

Software Self-Test As A Safety Mechanism For Processing Units
By Synopsys - 30 Nov, 2022 - Comments: 0

The growing dependency of modern automobiles on electronic functions increases the need for a variety of integrated circuits (ICs) for safety-critical applications. Requirements coming from different in-car subsystems drives the need for chip manufacturers to create a wide range of specialized solutions. This, in turn, raises the bar for automotive IP suppliers and pushes them to offer configur... » read more

Solving The Quantum Threat With Post-Quantum Cryptography On eFPGAs
By Flex Logix - 30 Nov, 2022 - Comments: 0

The quantum threat and post-quantum cryptography Advances in quantum computing technology threaten the security of current cryptosystems. Asymmetric cryptography algorithms that are used by modern security protocols for key exchange and digital signatures rely on the complexity of certain mathematical problems. Currently, the main problems used for asymmetric cryptography are integer f... » read more

Blog Review: Nov. 30
By Jesse Allen - 30 Nov, 2022 - Comments: 0

Cadence's Sangeeta Soni explores how the configuration space for CXL 1.1 and CXL 2.0 varies and discusses newly introduced registers for the CXL-compliant devices and how they are discovered during the CXL enumeration flow. Siemens EDA's Harry Foster continues examining trends in FPGA verification effort by looking at where both design and verification engineers spend their time. Synopsys... » read more

Going Beyond The Requirements Of A Root Of Trust For Measurement With The Silicon-Proven RT-660 Root of Trust
By Rambus - 30 Nov, 2022 - Comments: 0

The continuously evolving technology landscape and security requirements for systems present many challenges for device and silicon manufacturers. Nowhere is this truer than in data centers. Rambus has long recognized the need for security designs in data centers, and the Caliptra initiative discussed in this whitepaper is a welcome step towards a widespread adoption of Root of Trust designs i... » read more

How To Make The Charging Infrastructure For Electric Vehicles Smart
By Infineon - 30 Nov, 2022 - Comments: 0

Renewable energies and the increasing emergence of electric vehicles are putting a strain on the electricity grid. The former are not constantly available, and the latter require additional energy while charging. This leads to the need for introducing a new, smart charging infrastructure to avoid instabilities at the grid level. This white paper explains what is involved in making a charging in... » read more

Chip Industry’s Technical Paper Roundup: Nov. 29
By Linda Christensen - 29 Nov, 2022 - Comments: 0

New technical papers added to Semiconductor Engineering’s library this week. [table id=66 /]   Related Reading: Chip Industry’s Technical Paper Roundup: Nov. 21 New papers: lithography modeling; solving Rowhammer; energy-efficient batch normalization HW; 3-to-1 reconfigurable analog signal modulation circuit; lateral double magnetic tunnel junction; reduce branch mispredic... » read more

The Computational Electromagnetics Simulation Challenge Of 3D-IC
By Kelly Damalou - 29 Nov, 2022 - Comments: 0

By Kelly Damalou and Matt Commens Innovation in semiconductor design today is energized primarily by AI/ML, data centers, autonomous and electric vehicles, 5G/6G, and IoT. Recently developed 2.5 and 3D-IC silicon-based packaging technologies have advanced the state of the art beyond SoC technologies which first united digital, analog, and memory functions on a single chip in the '90s. These ... » read more

Research Bits: Nov. 29
By SE Staff - 29 Nov, 2022 - Comments: 0

Earth-bound, more accurate GPS A new idea for terrestrial-based global navigation satellite systems (GNSS) that uses very accurate national atomic clocks on the ground may help self-driving cars in urban environments get where they are going. Researchers from Delft University of Technology (TU Delft), Vrije Universiteit Amsterdam, and VSL have prototyped a hybrid optical–wireless mobile netw... » read more

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