5 Good Things About RISC-V
By Filip Benna - 27 Oct, 2022 - Comments: 0

RISC-V has been around for some time now, and if you are here it’s because you have heard of it. But perhaps you still need to be convinced that it is the future? If you still wonder about its potential and benefits, here are five good things about RISC-V. 1. RISC-V is an open standard Let’s start simple. This is nothing new, but let’s be clear on what open standard means. Open stan... » read more

Data Security Takes Front Seat In Industrial IoT Design
By Roger Wendelken - 27 Oct, 2022 - Comments: 0

As recently as 10 years ago, protecting Internet of Things (IoT) data was largely an afterthought. Engineers designing IoT and industrial IoT (IIoT) networks were more concerned with ensuring their applications functioned according to design specifications, not with the unintended consequences of releasing potentially sensitive information into the cloud. Today, with billions of sensors an... » read more

In-NAND Flash Processing Technique for Improved Performance, Energy Efficiency & Reliability of Bulk Bitwise Operations
By Technical Paper Link - 26 Oct, 2022 - Comments: 0

A new technical paper titled "Flash-Cosmos: In-Flash Bulk Bitwise Operations Using Inherent Computation Capability of NAND Flash Memory" was published by researchers at ETH Zurich, POSTECH, LIRMM/Univ. Montpellier/CNRS and Kyungpook National University. Find the technical paper here (published September 2022) and related YouTube lecture here. "We propose Flash-Cosmos (Flash Computation wi... » read more

Using Silicon Photonics To Reduce Latency On Edge Devices
By Technical Paper Link - 26 Oct, 2022 - Comments: 0

A new technical paper titled "Delocalized photonic deep learning on the internet’s edge" was published by researchers at MIT and Nokia Corporation. “Every time you want to run a neural network, you have to run the program, and how fast you can run the program depends on how fast you can pipe the program in from memory. Our pipe is massive — it corresponds to sending a full feature-leng... » read more

Bottoms Up: Arranging Nanoscale Particles On A Silicon Chip (Or Other Materials) Without Damage
By Technical Paper Link - 26 Oct, 2022 - Comments: 0

A new research paper titled "Nanoparticle contact printing with interfacial engineering for deterministic integration into functional structures" was just published by researchers at MIT. “This approach allows you, through engineering of forces, to place the nanoparticles, despite their very small size, in deterministic arrangements with single-particle resolution and on diverse surfaces, ... » read more

Technical and Structural Approaches To Centralize Automotive E/E Architectures
By Technical Paper Link - 26 Oct, 2022 - Comments: 0

A technical paper titled "Methodical Approach for Centralization Evaluation of Modern Automotive E/E Architectures" was published by researchers at University of Stuttgart and Daimler Truck AG. Abstract: "Centralization is considered as a key enabler to master the CPU-intensive features of the modern car. The development and architecture change towards the next generation car is influenced ... » read more

New Class of Electrically Driven Optical Nonvolatile Memory
By Technical Paper Link - 26 Oct, 2022 - Comments: 0

A new technical paper titled "Electrical Programmable Multi-Level Non-volatile Photonic Random-Access Memory" was published by researchers at George Washington University, Optelligence, MIT, and the University of Central Florida. Researchers demonstrate "a multi-state electrically-programmed low-loss non-volatile photonic memory based on a broadband transparent phase change material (Ge2Sb2S... » read more

3D Racetrack Memory Device (Max Planck)
By Technical Paper Link - 26 Oct, 2022 - Comments: 0

A new technical paper titled "Three-dimensional racetrack memory devices designed from freestanding magnetic heterostructures" was published by researchers at Max Planck Institute of Microstructure Physics in Halle, Germany. "Magnetic racetrack memory encodes data in a series of magnetic domain walls that are moved by current pulses along magnetic nanowires. To date, most studies have focuse... » read more

Addressing SRAM Verification Challenges
By Siemens EDA - 26 Oct, 2022 - Comments: 0

SureCore Limited is an SRAM IP company based in Sheffield, the United Kingdom, that develops low power memories for current and next generation silicon process technologies. Its award-winning, world-leading, low power SRAM designs are process independent and variability tolerant, making them suitable for a wide range of technology nodes. Two major product families have been announced: PowerM... » read more

AI-Driven Big Data Analytics Enables Actionable Intelligence, Improving SoC Design Productivity
By Cadence - 26 Oct, 2022 - Comments: 0

As the latest systems on chip (SoCs) grow in size and complexity, a vast amount of design data is generated during verification and implementation. Design data is business critical and, with the proliferation of artificial intelligence (AI) use in chip design, provides designers an opportunity to carry forward learnings and insights with every new design. To achieve first-pass success deliverin... » read more

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