Time To Watch China’s Equipment Efforts

By Mark LaPedus - 16 Jul, 2020 - Comments: 0

For years, China has been developing its own semiconductor equipment and materials industry. The goal has been to reduce its dependence on foreign equipment and material vendors. Some China-based equipment vendors have made their presence felt. But overall, China’s equipment companies have barely made a dent in the market. Hardly anyone has been paying attention to China’s equipment ... » read more

Speeding Up The R&D Metrology Process

By Mark LaPedus - 16 Jul, 2020 - Comments: 0

Several chipmakers are making some major changes in the characterization/metrology lab, adding more fab-like processes in this group to help speed up chip development times. The characterization/metrology lab, which is generally under the radar, is a group that works with the R&D organization and the fab. The characterization lab is involved in the early analytical work for next-generati... » read more

Semiconductor Memory Evolution And Current Challenges

By Michael Hargrove - 16 Jul, 2020 - Comments: 0

The very first all-electronic memory was the Williams-Kilburn tube, developed in 1947 at Manchester University. It used a cathode ray tube to store bits as dots on the screen’s surface. The evolution of computer memory since that time has included numerous magnetic memory systems, such as magnetic drum memory, magnetic core memory, magnetic tape drive, and magnetic bubble memory. Since the 19... » read more

Spiking Neural Networks Place Data In Time

By Katherine Derbyshire - 16 Jul, 2020 - Comments: 0

Artificial neural networks have found a variety of commercial applications, from facial recognition to recommendation engines. Compute-in-memory accelerators seek to improve the computational efficiency of these networks by helping to overcome the von Neumann bottleneck. But the success of artificial neural networks also highlights their inadequacies. They replicate only a small subset of th... » read more

Advanced Materials For High-Temperature Process Integration

By James Lamb - 16 Jul, 2020 - Comments: 0

From the last several lithography nodes, in the 14 to 10nm range, to the latest nodes, in the 7 to 5nm range, the requirements for patterning and image transfer materials have increased dramatically. One of the key pinch points is the tradeoff between planarization and the high-temperature stability required from carbon films used in patterning and post-patterning process integration. Patter... » read more

Speeding Up Process Optimization With Virtual Processing

By Coventor - 16 Jul, 2020 - Comments: 0

Advanced CMOS scaling and new memory technologies have introduced increasingly complex structures into the device manufacturing process. For example, the increase in NAND memory layers has achieved greater vertical NAND scaling and higher memory density, but has led to challenges in high aspect ratio etch patterning and foot print scaling issues. Unique integration and patterning schemes have b... » read more

Beyond-Line-Of-Sight Troposcatter Communications Primer

By Kasyap Patel - 16 Jul, 2020 - Comments: 0

Though tropospheric scatter (troposcatter, or tropo) communications technology has existed since the 1950s and was used by the U.S. military from 1960 to 2002, this legacy technology is being revitalized in the wake of concerns around the reliability of tactical satellite communications (Satcom). For several decades, satellites were a reliable and secure method of communications that provided s... » read more

Atomic Layer Etch Expands To New Markets

By Mark LaPedus - 16 Jul, 2020 - Comments: 0

The semiconductor industry is developing the next wave of applications for atomic layer etch (ALE), hoping to get a foothold in some new and emerging markets. ALE, a next-generation etch technology that removes materials at the atomic scale, is one of several tools used to process advanced devices in a fab. ALE moved into production for select applications around 2016, although the technolog... » read more

Copper Electrodeposition For Fan-Out Wafer-Level Packaging

By Lam Research - 16 Jul, 2020 - Comments: 0

As integrated circuit designers bring more sophisticated chip functionality into smaller spaces, heterogeneous integration, including 3D stacking of devices, becomes an increasingly useful and cost-effective way of mixing and connecting various functional technologies. One of the heterogeneous integration platforms gaining increased acceptance is high density fan-out wafer-level packaging (FOWL... » read more

Generalized Class-E Power Amplifier With Shunt Capacitance And Shunt Filter

By Various Writers - 16 Jul, 2020 - Comments: 0

This paper presents a generalized analysis of the Class-E power amplifier (PA) with a shunt capacitance and a shunt filter, leading to a revelation of a unique design flexibility that can be exploited either to extend the maximum operating frequency of the PA or to allow the use of larger active devices with higher power handling capability. The proposed PA fulfills zero voltage switching (ZVS)... » read more

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