Ansys SPEOS: Illuminating The Possibilities


Ansys SPEOS enables optical engineers to fine-tune critical factors such as propagation, reflection, visibility and legibility, while also identifying problems such as glare and hot spots. In a broad range of applications in the automotive, aerospace and general lighting segments, SPEOS cuts significant time and expense from the design cycle, while supporting the high degree of innovation neede... » read more

Exhaustive Verification of Reset Domain Crossings


It is difficult to imagine an aspect of semiconductor development more fundamental than reset. The ability to initialize the entire hardware design and clean all software running through a system-on-chip (SoC) is essential. Stating with a known state avoids propagation of signals with unknown values. Despite the best efforts at verification, lingering corner case bugs may put a system into a st... » read more

AI Requires Tailored DRAM Solutions


For over 30 years, DRAM has continuously adapted to the needs of each new wave of hardware spanning PCs, game consoles, mobile phones and cloud servers. Each generation of hardware required DRAM to hit new benchmarks in bandwidth, latency, power or capacity. Looking ahead, the 2020s will be the decade of artificial intelligence/machine learning (AI/ML) touching every industry and applicatio... » read more

Blog Review: April 8


Synopsys' Taylor Armerding shares some tips for getting development, security, and operations teams communicating effectively and working toward a single purpose. Cadence's Paul McLellan looks back over computing history to how the best way to deliver computing resources has shifted from cloud to edge and back again. Mentor's Shivani Joshi shares an overview of flexible PCB designs and wh... » read more

Redefining Device Failures


Can a 5nm or 3nm chip really perform to spec over a couple decades? The answer is yes, but not using traditional approaches for designing, manufacturing or testing those chips. At the next few process nodes, all the workarounds and solutions that have been developed since 45nm don't necessarily apply. In the early finFET processes, for example, the new transistor structure provided a huge im... » read more

The Convergence Of Advanced Packaging And SMT


One statement is almost always true in the electronics industry: smaller is better. The relentless demand for electronic systems that pack more computing power and functionality into less space has driven the development of new processes and designs since the invention of the integrated circuit. In recent years that drive has taken a new direction, literally, as manufacturers have discovered th... » read more

Inside The New Non-Volatile Memories


The search continues for new non-volatile memories (NVMs) to challenge the existing incumbents, but before any technology can be accepted, it must be proven reliable. “Everyone is searching for a universal memory,” says TongSwan Pang, Fujitsu senior marketing manager. "Different technologies have different reliability challenges, and not all of them may be able to operate in automotive g... » read more

Lessons In Monitoring System Performance


At proteanTecs, we set out to revolutionize electronics with a breakthrough approach to address the challenges that come with scale: Deep Data monitoring of the health & performance of systems, from design to field. Knowledge and education are profoundly rooted in our core values. However, as the circumstances of COVID-19 unfold, we are following the guidelines of the World Health Organi... » read more

Benefits And Drawbacks Of Working From Home


Many people are working home in recent weeks, due to the current Coronavirus (Covid-19) crisis.  At yieldHUB, a good number of us have worked remotely or from a home office for years. We have people working like this in Taiwan, the USA, the UK and Ireland. As well as that, our software system enables semiconductor engineers and their managers to work remotely or from home. There are many be... » read more

Reliability Challenges Grow For 5/3nm


Ensuring that chips will be reliable at 5nm and 3nm is becoming more difficult due to the introduction of new materials, new transistor structures, and the projected use of these chips in safety- and mission-critical applications. Each of these elements adds its own set of challenges, but they are being compounded by the fact that many of these chips will end up in advanced packages or modul... » read more

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