category: Blogs – LPHP

category: Auto, Security & Edge AI

The Wearables Wave Expands Today’s Mobile Experience
By Andrew Frame - 10 Apr, 2014 - Comments: 1

By Andrew Frame and Bee Hayes-Thakore There’s no question that the mobile experience is expanding. Today’s smartphones, all powerful computing devices, have made it possible for us to stay connected to the information that matters most to us, offering at-a-glance information in a compact, portable form for extended periods of time. Most of us are always within easy reach of our smartphones... » read more

A High-Level ‘How To’ Guide For Effective Chip-Package Thermal Co-Design
By Mentor Graphics Staff Writers - 10 Apr, 2014 - Comments: 0

By John Parry and Byron Blackmore Concurrent design of a chip and its packaging environment is becoming more important than ever for several reasons. Designing a large, high power die, e.g. a System-on-Chip (SoC), without considering how to get the heat out is likely to lead to problems later on, resulting in a sub-optimal packaging solution from cost, size, weight and performance perspective... » read more

FinFET Based Designs: Power Analysis Considerations
By Aveek Sarkar - 10 Apr, 2014 - Comments: 2

Design teams working on mobile, computing, networking and other low power, high performance IPs and SoCs are migrating to FinFET-based technologies. However the benefits from their smaller sizes and the ability to deliver consistent performance at ultra-low sub-1V nominal supply voltage levels is outweighed by the worsening of power noise and reliability. As mentioned in an earlier blog on Powe... » read more

Platforms, Standards, Methodologies Conquer Design Challenges
By Brian Fuller - 10 Apr, 2014 - Comments: 0

We in the electronics design world always have spent a lot of time wringing our hands (will we ever get to design below 1 micron??) And while the problems are not imagined—they’re often soberingly real—we tend to plow through them, or, when necessary around them. Today, amid increasing complexity and risk, we’re leveraging platforms, standards and new methodologies to slay these d... » read more

Can RTL Power Estimation Accuracy Be Improved?
By Mark Baker - 10 Apr, 2014 - Comments: 0

The power targets for today’s complex SoC designs force design teams to address power optimization earlier and more effectively than ever before. In recent years, design teams have migrated to RTL power estimation solutions to identify areas of potential power savings to be used in early design tradeoffs. RTL power estimation accuracy at 15% to 20% to gate-level power numbers is deemed accept... » read more

Switching Activity And The Unknown
By Rob Eccles - 10 Apr, 2014 - Comments: 0

Switching activity is essential to measuring power in digital circuits, and it is also important for optimizing digital designs. Power can be static, caused by leakage, or dynamic, caused by switching. Switching activity is crucial because dynamic power is, after all, proportional to the switching activity in the design. Definition Switching activity is the measurement of changes of signal ... » read more

Inspired By The IoT Yet?
By Ann Mutschler - 10 Apr, 2014 - Comments: 1

You can't go too far in the world of technology today without running into the topic of the Internet of Things (IoT). And I don't know about you but the momentum is fascinating – not just the technology side, because innovation is always interesting, but also on the business development side of things due to the seemingly limitless potential for connectivity of devices that previously weren�... » read more

User Case Study: Using Formal To Verify Low Power Functionality And Eliminate Unwanted ‘Xs’
By Joseph Hupcey III - 10 Apr, 2014 - Comments: 3

The cynics among us might argue that the addition of low power circuitry is a clever scheme by the energy industry to cause an equal amount of power to be consumed by low power verification as is saved by end-user usage.  As if modern SoC verification wasn’t challenging enough, the addition of low power can create corner cases that can escape even the most well-written UVM testbenches.  Ind... » read more

Rethinking Low Power Verification
By David Hsu - 10 Apr, 2014 - Comments: 0

The discussion of low power verification has been centered around design complexity growth multiplied (or exponentiated) by growth in adoption of low power design techniques. The main objectives seem clear – ensure that: The specification for the low power intent is valid The low power implementation matches the specification, and that its architecture, structure and behavior is valid ... » read more

The Good Kind Of Regulation
By Barry Pangrle - 13 Mar, 2014 - Comments: 0

This month I’m taking a page from the Editor’s book, (actually the title for the article here came from Ed Sperling) and I decided that the above title would be fitting for this article. Last September we took a look at IBM’s presentations on their POWER8 processor from HotChips. One of the multiple new interesting aspects of this design was the use of many on-chip integrated voltage regu... » read more

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