Time For FMEDA Reuse?


How do designers quantify safety in electronic systems? Through one or more tables called Failure Modes, Effects and Diagnostic Analysis – FMEDA. In fact, an FMEDA does not have to be a table; it could be manifested in scripts or some other form, but a table is the easiest way to think of this information. Think of an FMEDA for an IP, as the concept extends easily to a system-on-chip (SoC). T... » read more

Traceability Is Not My Problem (Is It?)


What is all the fuss about traceability? If it is that important, should it be handled by a compliance group? Delegating to a separate team would be the preference for most design and verification team members, but it is not possible in this case. Traceability stops short of a big brother organization constantly looking over the shoulders of the development team. The more reasonable approach is... » read more

Optimizing NoC-Based Designs


Semiconductor development is currently in a phase of rapid evolution driven by the combination of new technologies and methodologies. The technique of combining multiple functions into systems-on-chips (SoCs) is continuing to grow in complexity. Rapid advancement in new technologies for market segments like data centers, robotics, ADAS and artificial intelligence/machine learning (AI/ML) are re... » read more

Where Do Memory Maps Come From?


A memory map is the bridge between a system-on-chip (SoC) and the firmware and software that is executed on it. Engineers may assume the map automatically appears, but the reality is much more involved. The union of hardware (HW) and software (SW) demands both planning and compromise. The outcome of this merger will not be fully realized until the magical day when the system comes to life. T... » read more

Verification Signoff Beyond Coverage


A common design view of verification signoff is to start with a comprehensive verification plan, covering every requirement defined among specifications and use-cases, the architectural definition, and any other relevant documents. Tests are then developed to cover every feature of the verification plan. Those tests are run and debugged, and identified issues are addressed within the design. Th... » read more

Traceability, Unfamiliar But Critical


Many understand that traceability is a popular concept. Still, understanding traceability in detail is more challenging, especially in how it connects to familiar objectives in the semiconductor design space. A simple way to understand is this: When a customer (call them C) asks a semiconductor supplier (call them S) to build a device to meet a system objective, they provide S with specificatio... » read more

More NoC Wisdom


A common experience for anyone promoting a disruptive technology is that prospective customers understand that what is being offered is different. Still, without a familiar reference to compare, they extrapolate expectations unreliably. Sometimes expectations are extrapolated to infinity: “My existing solution has limitations, but the new technology should have no limitations.” Sometimes ex... » read more

NoC Experiences From The Trenches


Network-on-chip (NoC) interconnect as an alternative to traditional crossbars is already well-proven, but there are still plenty of design teams on the cusp of a transition or who maybe do not yet see a need for a change. As with a switch to any new technology, the first hurdles are often simply misconceptions. When new users first evaluate any new technology, they often make the mistake of att... » read more

ISO 26262 – Law Or Framework?


The ISO 26262 standard is a weighty series of documents that many believe has all the force of law or regulation; however, it is not a dictate. It is an agreement on best practices for participants in the vehicle value chain to follow to ensure safety as far as the industry understands it today. There is no monetary fine if the standard is not followed, though it will be difficult to sell autom... » read more

IP-XACT Is Back, For All The Right Reasons


The intent behind IP-XACT has always been to provide a bridge between system-on-chip (SoC) assembly and larger considerations. This standard has additionally been used to adapt to multi-sourced and constantly evolving intellectual property (IP) that design and product teams build, often in different companies. Moreover, it was used to interface with product development beyond the specialized ne... » read more

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