Parallel RF Test For Next-Generation Communications


The test economics of state-of-the-art smartphones, tablets and routers demand highly parallel RF test. We are addressing this next wave in RF communications test, enabled by Wi-Fi 6E, operating in the 6GHz band and coming up to 7.125GHz. This forthcoming update to the Wi-Fi standard will extend the features and capabilities, including higher performance, lower latency, and faster data rates fo... » read more

Testing VCSEL Devices On-Wafer


Vertical-Cavity Surface-Emitting Lasers, or VCSELs, are seeing unparalleled demand, thanks to new uses for them in smartphone and automotive applications. 3D sensing for facial recognition is the key application in smartphones, with up to three VCSEL dies being integrated into a single phone. Emerging automotive applications such as driver monitoring, infotainment control and LiDAR will provide... » read more

Automotive IC Production Wafer Test In A Zero-Defect World


By Amy Leong, FormFactor. Innovations in automotive semiconductor ICs post a high bar for wafer test. FormFactor’s Chief Marketing Officer, Amy Leong, provides insights into the challenges associated with automotive IC production wafer testing amid the requirement for zero-defects. Click here to continue reading. » read more

Metrology at Automated Test Equipment Manufacturers


New technologies require an efficient qualification infrastructure to determine and qualify technical specifications. Metrology is the science which determines the acknowledged specification setting process based on proven international standards. This paper describes metrology and its role and benefits in automated test equipment business. By Piotr Skwierawski and Ralf Haefner. Click her... » read more

Accelerating SoC Verification Closure With Unified Verification Management Solution


Functional verification of system-on-chip (SoC) designs requires best-in-class tools linked together in a unified solution in order to address exponential complexity challenges. There is no one-size-fits-all method for verification. Complex designs require a combination of virtual prototyping, static checks, formal analysis, simulation, emulation and FPGA prototyping. The execution of all the t... » read more

Monitoring Critical Process Steps In 3D NAND Using Picosecond Ultrasonic Metrology With Both Thickness And Sound Velocity Capabilities


Amorphous carbon (a-C) based hard masks provide superior etch selectivity, chemical inertness, are mechanically strong, and have been used for etching deep, high aspect ratio features that conventional photoresists cannot withstand. Picosecond Ultrasonic Technology (PULSE Technology) has been widely used in thin metal film metrology because of its unique advantages, such as being a rapid, non-... » read more

Customer-Developed, Hyper-Convergent Design Flows Are Now Possible


We all know the days of sequential, compartmentalized chip design are over. In advanced technology nodes, placement impacts performance, performance impacts power, and routing impacts everything. The way to manage these challenges is to interleave design tasks. For example, provide information on late-stage routing to early-stage synthesis tools to improve convergence. This technique is commonl... » read more

Too Much Fab And Test Data, Low Utilization


Can there be such a thing as too much data in the semiconductor and electronics manufacturing process? The answer is, it depends. An estimated 80% or more of the data collected across the semiconductor supply chain is never looked at, from design to manufacturing and out into the field. While this may be surprising, there are some good reasons: Engineers only look at data necessary to s... » read more

Testing Silicon Photonics In Production


As silicon photonics costs come down, the technology is being worked into new applications, from connectivity to AI. But full commercial production requires testing those photonic circuits before shipping them. Photonics testing is only getting started. Volume production is still not happening, and test equipment and techniques are still being developed. What exists today is a blend of exist... » read more

DFT For SoCs Is Last, First, And Everywhere In Between


Back in the dawn of time, IC test was the last task in the design flow. First, you designed the chip and then you wrote the functional test program to verify it performed as expected after manufacturing. Without much effort, some portion of the functional test program was often reused as the manufacturing test to determine that the silicon was defect-free. Fast forward to today and things ha... » read more

← Older posts Newer posts →