category: System-Level Design

category: Auto, Security & Edge AI

IP’s Growing Impact On Yield And Reliability
By Ann Mutschler - 04 Sep, 2019 - Comments: 0

Chipmakers are finding it increasingly difficult to achieve first-pass silicon with design IP sourced internally and from different IP providers, and especially with configurable IP. Utilizing poorly qualified IP and waiting for issues to appear during the design-to-verification phase just before tape-out can pose high risks for design houses and foundries alike in terms of cost and time to... » read more

New Technologies To Support 3D-ICs
By Brian Bailey - 04 Sep, 2019 - Comments: 0

Semiconductor Engineering sat down to discuss changes required throughout the ecosystem to support three-dimensional (3D) chip design with Norman Chang, chief technologist for the Semiconductor Business Unit of ANSYS; John Park, product management director for IC packaging and cross-platform solutions at Cadence; John Ferguson, director of marketing for DRC applications at Mentor, a Siemens Bus... » read more

Blog Review: Sept. 4
By Jesse Allen - 04 Sep, 2019 - Comments: 0

Synopsys' Taylor Armerding checks out Apple's newly expanded bug bounty program, with bounty payouts are increasing to compete with malicious actors, and why even with security-oriented development the practice of bug bounties will remain needed. Mentor's Colin Walls shares a few more embedded software tips, this time on external variables, delay loops in real time systems, and meaningful pa... » read more

Week In Review: Design, Low Power
By Jesse Allen - 30 Aug, 2019 - Comments: 0

Rambus completed its acquisition of Northwest Logic, a supplier of memory, PCIe and MIPI digital controllers. The Hillsboro, OR office of Northwest Logic will remain in place, along with the entire staff. SureCore launched a new low power design service. The company's offering includes concept-to-tape-out low power mixed-signal design expertise such as design and layout capabilities, technol... » read more

Blog Review: Aug. 28
By Jesse Allen - 28 Aug, 2019 - Comments: 0

Cadence's Paul McLellan takes a look at the numerous challenges in designing and manufacturing Cerebras' massive 400,000 processor, 1.2 trillion transistor chip. Synopsys' Taylor Armerding points to a lack of robust mobile app security and why building in security from the beginning can lead to greater productivity and cost saving. Mentor's Paul Johnston takes a look at what's in store at... » read more

Chip Security Needs A New Language
By Sven Beyer - 26 Aug, 2019 - Comments: 0

By Sven Beyer and Sergio Marchese Safety- and security-critical systems, such as connected autonomous vehicles, require high-integrity integrated circuits (ICs). Functional correctness and safety are necessary to establish IC integrity, but not sufficient. Security is another critical pillar of IC integrity. Systems and products using ICs with security vulnerabilities ultimately undermine th... » read more

EDA Gears Up For 3D
By Brian Bailey - 26 Aug, 2019 - Comments: 0

Semiconductor Engineering sat down to discuss changes required throughout the ecosystem to support three-dimensional (3D) chip design with Norman Chang, chief technologist for the Semiconductor Business Unit of ANSYS; John Park, product management director for IC packaging and cross-platform solutions at Cadence; John Ferguson, director of marketing for DRC applications at Mentor, a Siemens Bus... » read more

Week In Review: Design, Low Power
By Jesse Allen - 23 Aug, 2019 - Comments: 0

Xilinx debuted the Virtex UltraScale+ VU19P, which the company says is now the world's largest FPGA at 1.6X the size of its predecessor. The VU19P features 35 billion transistors, 9 million system logic cells, up to 1.5 terabits per-second of DDR4 memory bandwidth and up to 4.5 terabits per-second of transceiver bandwidth, and over 2,000 user I/Os. With a set of debug, visibility tools, and IP,... » read more

Surround And Conquer
By Ed Sperling - 22 Aug, 2019 - Comments: 0

The processor wars are back in full swing, this time with some new players in the field. But what defines winning this time around is far less obvious than it was in the past, and it will take years before we know the outcome. The strategy is the same, though, and it's one that has been in use for years in the tech world. It began in the 1990s, when IBM came to the realization that it could ... » read more

Making Security User Friendly
By Brian Bailey - 22 Aug, 2019 - Comments: 0

Serious tradeoffs between technology accessibility and other optimization factors, such as power and security, can crop up especially in the early days of a new product’s design. A new product appeals to a certain category of users who need it to perform well enough that the technology can move forward. They are willing to overlook rough edges in the product and sometimes even glory in the le... » read more

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