category: System-Level Design

category: Auto, Security & Edge AI

Blog Review: Aug. 22
By Jesse Allen - 22 Aug, 2018 - Comments: 0

Cadence's Paul McLellan considers how much further we need to go to make EUV work for 5nm, the problem of cost, and ASML's EUV roadmap. In a video, Mentor's Colin Walls explains optimizing data in embedded software with a simple example of two ways to put data in memory and how to decide which is best. Synopsys' Fred Bals provides a rundown of the different types of application security t... » read more

System Bits: Aug. 21
By Ann Mutschler - 21 Aug, 2018 - Comments: 0

Two types of computers create faster, less energy-intensive image processor for autonomous cars, security cameras, medical devices Stanford University researchers reminded that the image recognition technology that underlies today’s autonomous cars and aerial drones depends on artificial intelligence. These are the computers that essentially teach themselves to recognize objects like a dog, ... » read more

Week In Review: Design, Low Power
By Jesse Allen - 17 Aug, 2018 - Comments: 0

Intel disclosed a speculative execution side-channel attack method called L1 Terminal Fault (L1TF). Leslie Culbertson, Intel's executive vice president and general manager of Product Assurance and Security, writes: "This method affects select microprocessor products supporting Intel Software Guard Extensions (Intel SGX) and was first reported to us by researchers at KU Leuven University, Techni... » read more

Blog Review: Aug. 15
By Jesse Allen - 15 Aug, 2018 - Comments: 0

Cadence's Paul McLellan checks out what's driving the growth of China's semiconductor industry plus the state of fab construction, from a CAPSA presentation by SEMI's Lung Chu. Mentor's Joe Hupcey III has some tips for how to handle inconclusive results in formal verification, starting with how to identify where the analysis got stuck. Synopsys' Taylor Armerding listens in on a presentati... » read more

System Bits: Aug. 14
By Ann Mutschler - 14 Aug, 2018 - Comments: 0

Machine-learning system determines the fewest, smallest doses that could still shrink brain tumors In an effort to improve the quality of life for patients by reducing toxic chemotherapy and radiotherapy dosing for glioblastoma, the most aggressive form of brain cancer, MIT researchers are employing novel machine-learning techniques. According to the team, glioblastoma is a malignant tumor ... » read more

Do Parallel Tools Make Sense?
By Brian Bailey - 10 Aug, 2018 - Comments: 0

Semiconductor Engineering sat down to talk about parallelization efforts within EDA with Andrea Casotto, chief scientist for Altair; Adam Sherer, product management group director in the System & Verification Group of Cadence; Harry Foster, chief scientist for Mentor, a Siemens Business; Vladislav Palfy, global manager for applications engineering at OneSpin; Vigyan Singhal, chief Oski for ... » read more

Week In Review: Design, Low Power
By Jesse Allen - 10 Aug, 2018 - Comments: 0

Achronix and Mentor uncorked an optimized HLS flow for Achronix's FPGA technology products. The integrated development environment enables designers to quickly go from C++ to FPGA using Mentor's Catapult HLS and Achronix's ACE design tools. Initially used for 5G wireless applications to reduce the overall development effort and improve QoR, it is suitable for any design targeting Achronix techn... » read more

Blog Review: Aug. 8
By Jesse Allen - 08 Aug, 2018 - Comments: 0

Cadence's Meera Collier provides a primer on the basics of quantum computing, including how quantum gates work using superpositions and how it could impact chip design. Mentor's Dennis Brophy shares a list of resources to help you get up to speed on the recently-approved Portable Test and Stimulus standard, which enables test scenarios to be run across different execution platforms. Synop... » read more

Agile Standards
By Brian Bailey - 08 Aug, 2018 - Comments: 0

Semiconductor Engineering sat down with Lu Dai, chairman for Accellera and senior director of engineering at Qualcomm, to discuss what's changing in standards development. What follows are excerpts of that conversation. SE: Accellera has had a great first half of the year. Dai: Yes, we are only half way through the year and yet we got Portable Stimulus Standard (PSS) out, the SystemC CCI ... » read more

Changing The Design Flow
By Ed Sperling - 07 Aug, 2018 - Comments: 0

Synopsys’ Michael Jackson talks with Semiconductor Engineering about why it’s becoming necessary to fuse together various pieces of digital design. https://youtu.be/AOWh4wjw-ps » read more

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