System Bits: June 26


I’m enjoying a very busy Design Automation Conference this week in San Francisco, and on the lookout for interesting research topics here. In the meantime, enjoy a few interesting items from around the globe. AI platform diagnoses Zika and other pathogens University of Campinas (UNICAMP) researchers in Brazil have developed an AI platform that can diagnose several diseases with a high deg... » read more

Emulation-Driven Implementation


Tech Talk: Haroon Chaudhri, director of Prime Power at Synopsys, talks about how to shorten time to market and increase confidence in advanced-node designs, while also reducing the amount of guard-banding and improving design freedom. https://youtu.be/xT3CIqjnaBk » read more

The Week In Review: Design


Tools Synopsys revealed a power analysis solution for early SoC design as well as signoff-accurate power and reliability closure. PrimePower has reliability as a major focus, expanding power and reliability signoff and ECO closure capabilities from physical awareness to cell electromigration effects. Supported power types include peak power, average power, clock network power, leakage power, a... » read more

Blog Review: June 20


Mentor's Randy Allen digs into OpenACC, a collection of directives and routines to help a compiler uncover and schedule parallelism, plus an examination of the GCC implementation's performance. Cadence's Paul McLellan takes a look at the shifting opinions on FD-SOI vs. finFET as Dan Hutcheson of VLSI Research finds most see the two as complementary technologies in his latest survey. Synop... » read more

System Bits: June 19


ML algorithm 3D scan comparison up to 1,000 times faster To address the issue of medical image registration that typically takes two hours or more to meticulously align each of potentially a million pixels in the combined scans, MIT researchers have created a machine-learning algorithm they say can register brain scans and other 3D images more than 1,000 times more quickly using novel learning... » read more

CEO Outlook On Chip Industry (Part 3)


Semiconductor Engineering sat down with Wally Rhines, president and CEO of Mentor, a Siemens Business; Simon Segars, CEO of Arm; Grant Pierce, CEO of Sonics; and Dean Drako, CEO of IC Manage. What follows are excerpts of that conversation. To view part one, click here. Part two is here. L-R: Dean Drako, Grant Pierce, Wally Rhines, Simon Segars. Photo: Paul Cohen/ESD Alliance SE: Securit... » read more

The Week In Review: Design


M&A MIPS has reportedly been acquired again, this time by AI startup Wave Computing. Wave focuses on data center-based neural network training using its parallel dataflow processing architecture. In March, the company signed on to use 64-bit multi-threaded processor cores from MIPS in future projects. Previously, MIPS was owned by Tallwood Venture Capital, which acquired MIPS from Imaginat... » read more

Blog Review: June 13


Synopsys' Taylor Armerding looks at what the flaws in OpenPGP and S/MIME encryption means for the IoT and warns that the problems of patching such devices could lead to an increasing chance of security failures. Cadence's Paul McLellan takes a peek at Imec's roadmap to see what the path to 3nm looks like, how nanosheets fit in, and why design and system technology co-optimization is necessar... » read more

System Bits: June 12


Writing complex ML/DL analytics algorithms Rice University researchers in the DARPA-funded Pliny Project believe they have the answer for every stressed-out systems programmer who has struggled to implement complex objects and workflows on ‘big data’ platforms like Spark and thought: “Isn’t there a better way?” Their answer: Yes with PlinyCompute, which the team describes as “a sys... » read more

The Week In Review: Design


Tools & IP Synopsys added machine learning capabilities to its Design Platform. The company highlighted benefits to the PrimeTime signoff tool, which saw 5X faster power recovery in customer designs at leading-edge geometries. Renesas is using the tool, noting a 4X power ECO speed-up. ArterisIP unveiled a standalone last level cache (LLC) for high-performance SoCs. CodaCache can be adde... » read more

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