The Week In Review: Design


Tools Ansys updated its simulation suite, improving the speed of PCB and electronic package simulation as well as integrating its embedded systems tool with its failure analysis capabilities. Other updates include a new visual ray tracing capability to aid in antenna placement, improved modeling of the quality of wireless links in the presence of electromagnetic interference and RF interferenc... » read more

One Belt, One Road


China's so-called One Belt, One Road policy on global trade could have significant repercussions on semiconductors and IP if it succeeds. It's hardly a slam-dunk, and China has been vying for a larger position in the semiconductor industry for some time. But this is a completely different strategy because China is not attempting to go it alone this time. China has been rather quietly build... » read more

Collaborative Multi-Board System Design


Designing electronic systems has become measurably more complex during the past decade. Many of the products that are developed today are in-fact complex interconnected systems. Using the automotive market as an example, the first level of a system is an element; an individual component or sub-assembly that is designed to be part of a larger collaborating function. At the next level is the sub-... » read more

The Semiconductor Industry’s Big Opportunity


Safety critical device development, particularly in the automotive electronics space, has the attention of the entire semiconductor industry. Not surprising, since next-generation cars represent the biggest opportunity yet since mobile devices. However, what’s less obvious are the various phases of this megatrend that represent real convergence from many specializations. Traditional automo... » read more

Portable Stimulus Status Report


The first release of the Portable Stimulus (PS) standard is slated for early next year. If it lives up to its promise, it could be the first new language and abstraction for verification in two decades. [getentity id="22028" e_name="Accellera"] uncorked the PS Early Adopter release at the Design Automation Conference (DAC) in June. The standard has been more than two years in the making by t... » read more

Training As A Strategic Weapon


In my last post, I discussed the topic of applying machine learning to the design of machine learning chips. I pointed out that one can achieve significant improvements in schedule predictability, PPA compliance and an overall reduction in program risk if machine learning is applied to the right kind of knowledge base. This is very real, and we are seeing the benefits of this approach daily. Bu... » read more

Executive Insight: Aart de Geus


Aart de Geus, chairman and co-CEO of [getentity id="22035" e_name="Synopsys"], sat down with Semiconductor Engineering to discuss machine learning and big data, the race toward autonomous vehicles, systems vs. chips, software vs. hardware, and the future of EDA. What follows are excerpts of that conversation. SE: The whole tech world is buzzing over data and how it gets used in areas such as... » read more

Traceability Matrices: Headache Or Real Value?


Traceability is becoming increasingly important in most engineering projects, if only on the grounds of ‘good practice,’ and it is specifically required for projects that have to meet safety standards such as DO-254 and ISO 26262. To provide traceability, you must maintain the relationships between all aspects of a project; from the system-level requirements through implementation and ve... » read more

Design And Verification For An Era Of A Trillion Devices


Scared or excited? When I did a back-of-the-envelope calculation whether the one trillion devices that Softbank’s CEO Masa-san predicted least year at ARM TechCon was possible, I realized that a trillion may be the low end of the range. For me, the geeky excitement about the potential technological progress and how to architect the Internet of Things (IoT) gets balanced very fast with concern... » read more

When Is Verification Complete?


Deciding when verification is done is becoming a much more difficult decision, prompting verification teams to increasingly rely on metrics rather than just the tests listed in the verification plan. This trend has been underway for the past couple of process nodes, but it takes time to spot trends and determine whether they are real or just aberrations. The Wilson Research Group conducts a ... » read more

← Older posts Newer posts →