The Gleaning Power of Piezo


By Brian Fuller The inventor and green-tech missionary Trevor Baylis walked 100 miles across an African desert nearly 10 years ago to prove piezoelectric technology could power a cell phone. It was an interesting story that quickly faded from memory, as the technology was deemed clever but impractical. Enter Elizabeth Redmond and Andrew Katz, who have taken Baylis’ inspiration and piezo’s... » read more

Lower Power, Bigger Problems


By Ed Sperling Low power used to be an afterthought in semiconductor design, and it almost was never a consideration in verification or manufacturability. But at each new process node, the number of power considerations goes up as the line widths go down. To begin with, there are two basic types of power. The first is dynamic, which has been a consideration ever since batteries were added int... » read more

Less Room For Error


By Ed Sperling Say goodbye to fat design margins in advanced SoCs. The commonly used method of adding extra performance or area into semiconductors to overcome variability in manufacturing processes or timing closure issues has begun to create problems of its own. While there was plenty of slack available at 90nm, adding margins at 45nm and 32nm disrupts performance or eats into an increasing... » read more

Home Sweet (Power-Hogging) Home?


By Brian Fuller Numbers, history and technology are on a collision course inside your home. Consider the numbers: The big picture points to an even bigger opportunity for smart system design that can reduce power in and out of the chip. Since 1982, growth in peak demand for electricity has exceeded transmission growth by almost 25% every year. Yet spending on research and development �... » read more

How Many Power Islands Is Too Many?


By Ed Sperling Power domains, also known as power islands, have become to design engineers what multiple cores are to processor architects. They can serve a purpose, namely reducing static current leakage and saving battery life. But they also can add so much complexity that they can make it almost impossible to get a new chip out the door. Just as there has been talk of hundreds of cores, th... » read more

Life Without Batteries Or Wires


By Ed Sperling In portable devices, low-power design has always been about stretching out the amount of time between battery charges or replacement. But the focus of current research throws that approach to the wind. The new goal is to get rid of batteries altogether and generate power using a variety of different mechanisms ranging from differences in temperature, the motion of waves, static... » read more

Writing Software For Low-Power Systems


By Ed Sperling Almost any discussion of software in low power systems these days involves some sort of multicore approach. That is particularly true at 90nm and below. At 65nm, unless there is a very distinct purpose for a low-power single-core device, it probably is utilizing at least two cores, and at 45nm the numbers can continue to rise, depending upon how many functions the chip is being... » read more

Making Batteries Better


By Brian Fuller The world has changed dramatically in the 209 years since Alessandro Volta hunched over his table by candlelight and figured out how to capture energy in his voltaic pile, the first electric battery. What has changed little, however, is the battery itself. Since Volta’s conception, the battery has remained a cell with negative and positive electrodes, an electrolyte, and... » read more

Follow The Design Activity


Everyone seems to be on a low-power kick, from the ASIC/ASSP world to the growing market of low-power embedded processors and SoCs. But what do the actual numbers tell us about the future trends for such low-power designs? One way to answer that question is to look at the result of architectural tradeoff studies currently being performed by chip designers. (See chart below) A causal glance a... » read more

Advanced Materials: Mapping A Path To Low-Power Devices


By Cheryl Ajluni For many electronics devices, especially those utilized in mobile applications, achieving low power is the Holy Grail. Unfortunately this goal is one that is not easily attained. In accordance with Moore’s Law, transistor density is continuing to increase. With each scaling, transistors are being designed smaller and faster to realize increased chip performance. But the risi... » read more

← Older posts Newer posts →