category: Top Stories

category: Auto, Security & Edge AI

Dropping The Voltage: Now What?
By Ed Sperling - 16 Aug, 2009 - Comments: 0

By Ed Sperling Ratcheting down the voltage in an SoC design seems like the simplest way to reduce power consumption, but it doesn’t always work out that way. In fact, reducing voltage can have some rather strange and unexpected effects at all levels of chip design, including testing and debugging. The problem is that not all parts of the chip work the same way without a minimum am... » read more

The Argument For Low Power In The Data Center
By Ann Mutschler - 16 Jul, 2009 - Comments: 0

By Ann Steffora Mutschler For budgetary and ‘green’ motives, enterprise IT customers are demanding higher energy efficiency from their servers. This ultimately rests on the shoulders of the processor designer as the MPU is a significant source of power usage. Interestingly, the hidden and ugly truth is that for most data center managers, the cost of electricity for that data center is... » read more

Existing Circuit Styles Shed Light On Low-Power Design
By Cheryl Ajluni - 16 Jul, 2009 - Comments: 0

By Cheryl Ajluni Given the growing importance and impact of portable, battery-operated devices in today’s society, it’s easy to understand why power consumption has become such a critical factor in IC design. But it’s not just battery-operated devices that are driving the need for low-power design. In non-portable devices, the cost of providing power and the increased area resultin... » read more

First Down On The 40nm Line
By Ed Sperling - 30 Jun, 2009 - Comments: 0

The race to 40nm is over. Some chipmakers are already there, taping out designs and implementing IP that has already been qualified at the 40nm process. When exactly volume production begins and when yields improve is a matter of conjecture. TSMC so far is the only major foundry actively using the 40nm process, which is a half-node beyond 45nm. But the Common Platform already has briefed a... » read more

The Impact of 3D Packaging
By Ann Mutschler - 11 Jun, 2009 - Comments: 0

With semiconductor packaging becoming a more crucial piece of the Moore’s Law roadmap, the industry is still sorting out the impact of a 3D design and packaging approach on design time, cost and power. 3D is now commonly used for high volume applications such as cell phones and SD cards, and is accomplished at the packaging step either through chip stacking or package-on-package (PoP) stac... » read more

Not A Household Name—Yet
By Various Writers - 11 Jun, 2009 - Comments: 0

By Alma Wang Spring and summer are typically the bustling seasons for China’s semiconductor industry. Each day, invitations arrive for members of the media to attend events, contests, and road shows. This year is different, though. It has been eerily quiet. And perhaps even stranger, a local IC design company that rarely makes media appearances announced a top-prize application design com... » read more

New Low-Power Memory Technology Under Development
By Pallab Chatterjee - 10 Jun, 2009 - Comments: 0

By Pallab Chatterjee Unity Semiconductor, which was formed in 2002 and has been in stealth mode until May of 2009, is progressing on the development of a very dense and low power non-volatile solid state memory technology. Unlike traditional semiconductor memory, which uses an active device and electron transport as the primary storage element, the Unity Semiconductor CMOx technology uses... » read more

FPGA Vendors Throw Kitchen Sink at Power-Consumption Issues
By Brian Fuller - 10 Jun, 2009 - Comments: 0

By Brian Fuller In the storied history of semiconductors, each era finds vendors generally attaching their strategy to a trendy application segment to differentiate themselves. For years, IC vendors were “computer companies.” Then they were in the “communications” business and more recently they were all about “consumer.” But the evolution of technology has forced a re-assessm... » read more

Software Becomes The Main Differentiating Factor
By Ed Sperling - 10 Jun, 2009 - Comments: 0

By Ed Sperling Software has always been critical in determining what makes one chip different from another, but for the next couple of process nodes it will take on new significance. Rather than just defining function, it also will be one of the key determinants in performance and function. Behind this change is a bottleneck in lithography, which generally is not something most design eng... » read more

Upgrading the 100-year-old grid, one standard at a time
By Brian Fuller - 10 Jun, 2009 - Comments: 0

By Brian Fuller The nation’s power grid hasn’t been upgraded in a century, but suddenly there’s a sense of urgency. In high-profile meetings from Washington to Santa Clara in the past two months, industry executives, scientists, engineers and government officials have ratcheted up the dialogue about modernizing how energy is generated, distributed and used. The movement, helped by a... » read more

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